1. 540fec6 Refactor some code from being inline to being out in a new class with methods. by Chris Lattner · 19 years ago
  2. cb4a38e Fix an obvious bug exposed when we are doing ADD X, 4 ==> MOV32ri $X+4, ... by Evan Cheng · 19 years ago
  3. 2c003e2 Add memory printing support for PPC. Input memory operands now work with by Chris Lattner · 19 years ago
  4. dd26033 Use the PrintAsmMemoryOperand to print addressing modes. by Chris Lattner · 19 years ago
  5. daf6bc6 Pass all the flags to the asm printer, not just the # operands. by Chris Lattner · 19 years ago
  6. fd6d282 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. by Chris Lattner · 19 years ago
  7. ed18b68 Refactor operand adding out to a new AddOperand method by Chris Lattner · 19 years ago
  8. 97f37a4 Fix a problem that Nate noticed that boils down to an over conservative check by Chris Lattner · 19 years ago
  9. 6990600 Add pointer and reference types. Added short-term code to ignore NULL types by Jim Laskey · 19 years ago
  10. 7e88103 Get VC++ building again. by Jeff Cohen · 19 years ago
  11. 0e43f2b Implement (most of) selection of inline asm memory operands. by Chris Lattner · 19 years ago
  12. e5d8861 Implement selection of inline asm memory operands by Chris Lattner · 19 years ago
  13. 87bc3bd Lower C_Memory operands. by Chris Lattner · 19 years ago
  14. 2b7401e Recognize memory operand codes by Chris Lattner · 19 years ago
  15. fe3db46 Parse the %*# constraint modifiers by Chris Lattner · 19 years ago
  16. 434b40b Added basic support for typedefs. by Jim Laskey · 19 years ago
  17. d0839f3 PPC JIT relocation model should be DynamicNoPIC. by Evan Cheng · 19 years ago
  18. 020d2e8 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, by Evan Cheng · 19 years ago
  19. 9f6637d Fix an endianness problem on big-endian targets with expanded operands by Chris Lattner · 19 years ago
  20. e3f0157 Implement the PPC inline asm "L" modifier. This allows us to compile: by Chris Lattner · 19 years ago
  21. c3a9f8d Record all of the expanded registers in the DAG and machine instr, fixing by Chris Lattner · 19 years ago
  22. f4afdd9 DwarfWriter reading basic type information from llvm-gcc4 code. by Jim Laskey · 19 years ago
  23. ffab422 Code cleanups, no functionality change by Chris Lattner · 19 years ago
  24. e650a6b "." isn't enough to get a private label on linux, use ".L". by Chris Lattner · 19 years ago
  25. 205065a add a small and simple case. by Chris Lattner · 19 years ago
  26. 3032410 A couple of new entries. by Evan Cheng · 19 years ago
  27. a0ea053 PIC related bug fixes. by Evan Cheng · 19 years ago
  28. 224ec39 X86 codegen tweak to use lea in another case: by Evan Cheng · 19 years ago
  29. f1616da Missing .globl for weak / link-once .text symbols. by Evan Cheng · 19 years ago
  30. f8bf116 Fix Regression/Transforms/LoopUnswitch/2006-02-22-UnswitchCrash.ll, which by Chris Lattner · 19 years ago
  31. 9b6fb5d This fixes a couple of problems with expansion by Chris Lattner · 19 years ago
  32. b3befd4 Don't return registers from register classes that aren't legal. by Chris Lattner · 19 years ago
  33. 864635a Change a whole bunch of code to be built around RegsForValue instead of by Chris Lattner · 19 years ago
  34. 4c1aa86 - Added option -relocation-model to set relocation model. Valid values include static, pic, by Evan Cheng · 19 years ago
  35. 0420f2a Coordinate activities with llvm-gcc4 and dwarf. by Jim Laskey · 19 years ago
  36. bd28e3f Add some comments, simplify some code, and fix a bug that caused rewriting by Chris Lattner · 19 years ago
  37. 470a6ad Added MMX, SSE1, and SSE2 vector instructions and some simple patterns. by Evan Cheng · 19 years ago
  38. 1efa40f split register class handling from explicit physreg handling. by Chris Lattner · 19 years ago
  39. 0f0b7d4 Adjust to changes in getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
  40. 4217ca8dc Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
  41. 4e4c71e One more round of reorg so sabre doesn't freak out. :-) by Evan Cheng · 19 years ago
  42. beb07e1 A big more cleaning up. by Evan Cheng · 19 years ago
  43. bf156d1 Moving things to their proper places. by Evan Cheng · 19 years ago
  44. ffcb95b Split instruction info into multiple files, one for each of x87, MMX, and SSE. by Evan Cheng · 19 years ago
  45. a1532bc missed optzn by Chris Lattner · 19 years ago
  46. 2deb87f The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter by Chris Lattner · 19 years ago
  47. 747a90d Added separate alias instructions for SSE logical ops that operate on non-packed types. by Evan Cheng · 19 years ago
  48. 7dbc0a3 Added MMX and XMM packed integer move instructions, movd and movq. by Evan Cheng · 19 years ago
  49. 933be33 Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. by Evan Cheng · 19 years ago
  50. aea20f5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit by Evan Cheng · 19 years ago
  51. 755ee8f Some updates by Evan Cheng · 19 years ago
  52. 7d20d39 Fix a problem Nate and Duraid reported where simplifying nodes can cause by Chris Lattner · 19 years ago
  53. dca7abe Fix a problem on itanium with memset. The value to set has been promoted to by Chris Lattner · 19 years ago
  54. a6fc94b improved support for branch folding, still not enabled. by Chris Lattner · 19 years ago
  55. 45af8fd If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take by Evan Cheng · 19 years ago
  56. bce4805 Fix bugs identified by VC++. by Jeff Cohen · 19 years ago
  57. 003a272 Add a fold for add that exchanges it with a constant shift if possible, so by Nate Begeman · 19 years ago
  58. db41024 Implement deletion of dead blocks, currently disabled. by Chris Lattner · 19 years ago
  59. b0d04a7 Add checks to make sure we don't create bogus extend nodes, and fix a bug by Nate Begeman · 19 years ago
  60. 2b15271 Added fisttp for fp to int conversion. by Evan Cheng · 19 years ago
  61. 6428302 Disable PIC for JIT. by Evan Cheng · 19 years ago
  62. caf4893 a previous patch completely disabled trivial unswitching, this fixees it. by Chris Lattner · 19 years ago
  63. f4412d8 initial trivial support for folding branches that have now-constant destinations. by Chris Lattner · 19 years ago
  64. 5e8b555 Jit does not support PIC yet. by Evan Cheng · 19 years ago
  65. 25cae0f When unswitching a loop, make sure to update loop info with exit blocks in by Chris Lattner · 19 years ago
  66. 299520d Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll by Chris Lattner · 19 years ago
  67. 7ccced6 x86 / Darwin PIC support. by Evan Cheng · 19 years ago
  68. d2ee218 Moved PICEnabled to include/llvm/Target/TargetOptions.h by Evan Cheng · 19 years ago
  69. 012f241 Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't by Chris Lattner · 19 years ago
  70. fb7217b Clean up DemandedBitsAreZero interface by Nate Begeman · 19 years ago
  71. cd6a6ed Don't expand sdiv by power of two before legalize, since it will likely by Nate Begeman · 19 years ago
  72. c2fe97e unbreak the build by Chris Lattner · 19 years ago
  73. 5298bcc Unbreak x86 be by Evan Cheng · 19 years ago
  74. 0017d48 Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty by Chris Lattner · 19 years ago
  75. 551bf3f kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC by Nate Begeman · 19 years ago
  76. 2512569 Fix another miscompilation exposed by lencode, where we lowered i64->f32 by Chris Lattner · 19 years ago
  77. a648df2 add note about div by power of 2 by Chris Lattner · 19 years ago
  78. 5755b17 Fix bug noticed by VC++. by Jeff Cohen · 19 years ago
  79. 9c3c2e9 Whoops, didn't mean to check this in yet. by Nate Begeman · 19 years ago
  80. c22f357 Add a missing and useful pat frag by Nate Begeman · 19 years ago
  81. 52221f7 start of some new simplification code, not thoroughly tested, use at your own by Chris Lattner · 19 years ago
  82. 7634ac4 Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" by Evan Cheng · 19 years ago
  83. 4c5dcf5 Kill the x86 pattern isel. boom. by Nate Begeman · 19 years ago
  84. dc8acb6 Remove the entry about using movapd for SSE reg-reg moves. by Evan Cheng · 19 years ago
  85. 39d1761 pxor (for FLD0SS) encoding was missing the OpSize prefix. by Evan Cheng · 19 years ago
  86. 6a6eb7b Remove the skeleton target, it doesn't produce useful code and there are by Chris Lattner · 19 years ago
  87. cffbb51 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it by Evan Cheng · 19 years ago
  88. fe5cb19 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This by Evan Cheng · 19 years ago
  89. 19ade3b Use movaps / movapd to spill / restore V4F4 / V2F8 registers. by Evan Cheng · 19 years ago
  90. 368e18d Rework the SelectionDAG-based implementations of SimplifyDemandedBits by Nate Begeman · 19 years ago
  91. 10cd9bb Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :) by Chris Lattner · 19 years ago
  92. 77dea9b MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. by Evan Cheng · 19 years ago
  93. 00d3d44 by Duraid Madina · 19 years ago
  94. 298ebf2 If the false case is the current basic block, then this is a self loop. by Evan Cheng · 19 years ago
  95. 8f4880b Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written by Chris Lattner · 19 years ago
  96. 21c107a Fix VC++ warning. by Jeff Cohen · 20 years ago
  97. d51425a Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg by Evan Cheng · 20 years ago
  98. f17c42d fix a bug where we unswitched the wrong way by Chris Lattner · 20 years ago
  99. 18a8452 A bit more memset / memcpy optimization. by Evan Cheng · 20 years ago
  100. a48654e Implement trivial unswitching for switch stmts. This allows us to trivial by Chris Lattner · 20 years ago