- 54aeea3 Disable constant-offset folding for PowerPC, as the PowerPC target by Dan Gohman · 17 years ago
- da43bcf Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. by Evan Cheng · 17 years ago
- 0ba2bcf Fix these enums' starting values to reflect the way that by Dan Gohman · 17 years ago
- 7795932 Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" by Bill Wendling · 17 years ago
- 095cc29 Define CallSDNode, an SDNode subclass for use with ISD::CALL. by Dan Gohman · 17 years ago
- 97efa36 Implement partial-word binary atomics on ppc. by Dale Johannesen · 17 years ago
- bdab93a Implement 32 & 64 bit versions of PPC atomic binary primitives. by Dale Johannesen · 17 years ago
- 140a8bb Remove PPC-specific lowering for atomics; the generic stuff works fine. by Dale Johannesen · 17 years ago
- 475871a Rename SDOperand to SDValue. by Dan Gohman · 17 years ago
- 5330192 Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson! by Evan Cheng · 17 years ago
- 126d907 Rather than having a different custom legalization by Duncan Sands · 17 years ago
- 2887310 Added MemOperands to Atomic operations since Atomics touches memory. by Mon P Wang · 17 years ago
- 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 17 years ago
- 30e62c0 Tail call optimization improvements: by Arnold Schwaighofer · 17 years ago
- 5e76423 A few inline asm cleanups: by Chris Lattner · 17 years ago
- 8608f2e 64-bit atomic operations. by Evan Cheng · 17 years ago
- 54fc97d PPC32 atomic operations. by Evan Cheng · 17 years ago
- 7925ed0 Add support for multiple return values for the PPC target by by Dan Gohman · 17 years ago
- 5b8f82e Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's by Scott Michel · 17 years ago
- 5b3b695 Move PPC lowering functions into PPCTargetLowering by Dale Johannesen · 17 years ago
- 28d08fd Interface of getByValTypeAlignment differed between by Dale Johannesen · 17 years ago
- 977a76f Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits by Dan Gohman · 18 years ago
- fd29e0e Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. by Dan Gohman · 18 years ago
- ff9b373 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert by Evan Cheng · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 3fc027d implement __builtin_return_addr(0) on ppc. by Chris Lattner · 18 years ago
- 1f87300 Implement ExpandOperationResult for ppc i64 fp->int, which fixes by Chris Lattner · 18 years ago
- 6eaeff2 Next PPC long double bits: ppcf128->i32 conversion. by Dale Johannesen · 18 years ago
- 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 18 years ago
- 61e729e More explicit keywords. by Dan Gohman · 18 years ago
- 66ffe6b Vector fneg must be expanded into fsub -0.0, X. by Evan Cheng · 18 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
- 0111999 Starting implementation of the ELF32 ABI specification of varargs handling. by Nicolas Geoffray · 18 years ago
- c9addb7 implement the new addressing mode description hook. by Chris Lattner · 18 years ago
- 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 18 years ago
- 8619391 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
- 43c6e7c Implemented the frameaddress intrinsic for PPC. by Nicolas Geoffray · 18 years ago
- 63f8fb1 Differentiate between the MachO and the ELF ABI the CALL instruction. by Nicolas Geoffray · 18 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 18 years ago
- 3c983c3 Fix a spelling error by Nate Begeman · 19 years ago
- 2f616bf by Jim Laskey · 19 years ago
- 144d8f0 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode by Evan Cheng · 19 years ago
- fc5b1ab Refactor all the addressing mode selection stuff into the isel lowering by Chris Lattner · 19 years ago
- 331d1bc Implement the getRegForInlineAsmConstraint method for PPC. With recent by Chris Lattner · 19 years ago
- dba1aee Change the prototype for TargetLowering::isOperandValidForConstraint by Chris Lattner · 19 years ago
- 3a9ec24 For PR387: by Reid Spencer · 19 years ago
- d998938 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps by Chris Lattner · 19 years ago
- c703a8f Make PPC call lowering more aggressive, making the isel matching code simple by Chris Lattner · 19 years ago
- abde460 Instead of implementing LowerCallTo directly, let the default impl produce an by Chris Lattner · 19 years ago
- 8ab5fe5 Switch the PPC backend over to using FORMAL_ARGUMENTS for formal argument by Chris Lattner · 19 years ago
- 90564f2 Implement an important entry from README_ALTIVEC: by Chris Lattner · 19 years ago
- e87192a Rename get_VSPLI_elt -> get_VSPLTI_elt by Chris Lattner · 19 years ago
- 140a58f Change the interface to the predicate that determines if vsplti* can be used. by Chris Lattner · 19 years ago
- f24380e Match vpku[hw]um(x,x). by Chris Lattner · 19 years ago
- caad163 Add support for matching vmrg(x,x) patterns by Chris Lattner · 19 years ago
- 116cc48 Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles. by Chris Lattner · 19 years ago
- d0608e1 Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to by Chris Lattner · 19 years ago
- ddb739e Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into by Chris Lattner · 19 years ago
- 7ff7e67 Ask legalize to promote all vector shuffles to be v16i8 instead of having to by Chris Lattner · 19 years ago
- bbe77de Inform the dag combiner that the predicate compares only return a low bit. by Chris Lattner · 19 years ago
- a17b155 Lower vector compares to VCMP nodes, just like we lower vector comparison by Chris Lattner · 19 years ago
- 7f20b13 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact by Chris Lattner · 19 years ago
- 6d92cad Codegen vector predicate compares. by Chris Lattner · 19 years ago
- 5b6a01b Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead by Evan Cheng · 19 years ago
- 9c61dcf Codegen things like: by Chris Lattner · 19 years ago
- 64b3a08 add support for using vxor to build zero vectors. This implements by Chris Lattner · 19 years ago
- ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 19 years ago
- ef819f8 fix duplicate definition errors by Chris Lattner · 19 years ago
- 3c0f9cc Check in some intermediate code that adds a skeleton for matching vsplt* by Chris Lattner · 19 years ago
- f1d0b2b Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. by Chris Lattner · 19 years ago
- b2177b9 Custom lower SCALAR_TO_VECTOR into lve*x. by Chris Lattner · 19 years ago
- c4c6257 Added getTargetLowering() to TargetMachine. Refactored targets to support this. by Evan Cheng · 19 years ago
- 5126984 Compile this: by Chris Lattner · 19 years ago
- 8c13d0a Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. by Chris Lattner · 19 years ago
- 1efa40f split register class handling from explicit physreg handling. by Chris Lattner · 19 years ago
- 4217ca8dc Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
- ad3bc8d Implement getConstraintType for PPC. by Chris Lattner · 20 years ago
- 763317d Add the simple PPC integer constraints by Chris Lattner · 20 years ago
- ddc787d add info about the inline asm register constraints for PPC by Chris Lattner · 20 years ago
- 281b55e Use PPCISD::CALL instead of ISD::CALL by Chris Lattner · 20 years ago
- bba534d Make llvm.frame/returnaddr not crash on ppc by Chris Lattner · 20 years ago
- ee62557 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for by Nate Begeman · 20 years ago
- acc398c First part of bug 680: by Nate Begeman · 20 years ago
- da6d20f Give PPCISD:: nodes legible names in dumps. by Chris Lattner · 20 years ago
- 9e4dd9d Pattern-match return. Includes gross hack! by Nate Begeman · 20 years ago
- 993aeb2 Prepare support for AltiVec multiply, divide, and sqrt. by Nate Begeman · 20 years ago
- 4172b10 Use new PPC-specific nodes to represent shifts which require the 6-bit by Chris Lattner · 20 years ago
- 860e886 Add an initial hack at legalizing GlobalAddress into the appropriate nodes by Chris Lattner · 20 years ago
- 4a95945 Add the ability to lower return instructions to TargetLowering. This by Nate Begeman · 20 years ago
- 21e463b More PPC32 -> PPC changes, as well as merging some classes that were by Nate Begeman · 20 years ago
- 2668959 Rename PowerPC*.h to PPC*.h by Chris Lattner · 20 years ago
- c09eeec Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we by Nate Begeman · 20 years ago
- f760532 Move FCTIWZ handling out of the instruction selectors and into legalization, by Chris Lattner · 20 years ago
- 8a2d3ca implement SELECT_CC fully for the DAG->DAG isel! by Chris Lattner · 20 years ago
- 0bbea95 Make fsel emission work with both the pattern and dag-dag selectors, by by Chris Lattner · 20 years ago
- e4bc9ea add initial support for converting select_cc -> fsel in the legalizer by Chris Lattner · 20 years ago
- 7c5a3d3 Pull the LLVM -> DAG lowering code out of the pattern selector so that it by Chris Lattner · 20 years ago