1. 0933134 [MC][COFF] Delay handling symbol aliases when writing by Michael J. Spencer · 12 years ago
  2. d855049 LoopVectorize: convert TinyTripCountVectorThreshold constant by Pekka Jaaskelainen · 12 years ago
  3. aaf2e63 Support artificial parameters in function types. by David Blaikie · 12 years ago
  4. 0adfded Fix 64-bit atomic operations in Thumb mode. by Tim Northover · 12 years ago
  5. e6482fa Merge SSE and AVX shuffle instructions in the comment printer. by Craig Topper · 12 years ago
  6. 606c8e3 Convert getAttributes() to return an AttributeSetNode. by Bill Wendling · 12 years ago
  7. 710cb0c Add support for source and line information to IntelJITEventListener for object emitted by MCJIT. by Andrew Kaylor · 12 years ago
  8. 5ff776b This patch addresses bug 15031. by Bill Schmidt · 12 years ago
  9. 647c66e [msan] Mostly disable msan-handle-icmp-exact. by Evgeniy Stepanov · 12 years ago
  10. 467016e Fix 256-bit PALIGNR comment decoding to understand that it works on independent 256-bit lanes. by Craig Topper · 12 years ago
  11. 970a479 [XCore] Add missing l2rus instructions. by Richard Osborne · 12 years ago
  12. b719d8b [XCore] Add missing l2r instructions. by Richard Osborne · 12 years ago
  13. 9d2b1ae [XCore] Add missing 1r instructions. by Richard Osborne · 12 years ago
  14. f5e7e79 [XCore] Add missing 0r instructions. by Richard Osborne · 12 years ago
  15. 914f8c4 When the legalizer is splitting vector shifts, the result may not have the right shift amount type. by Benjamin Kramer · 12 years ago
  16. 455151e Re-revert r173342, without losing the compile time improvements, flat by Chandler Carruth · 12 years ago
  17. ff715b2 PR14566: Debug Info: Removing top level lexical blocks by David Blaikie · 12 years ago
  18. 200b306 X86: Decode PALIGN operands so I don't have to do it in my head. by Benjamin Kramer · 12 years ago
  19. 11f2bf7 X86: Do splat promotion later, so the optimizer can chew on it first. by Benjamin Kramer · 12 years ago
  20. 6bbc142 FileCheckize and merge some tests. by Benjamin Kramer · 12 years ago
  21. e27a787 Add DIContext::getLineInfoForAddressRange() function and test. This function allows a caller to obtain a table of line information for a function using the function's address and size. by Andrew Kaylor · 12 years ago
  22. e40abca llvm/test/CMakeLists.txt: Add a dependency to llvm-rtdyld in check-llvm. by NAKAMURA Takumi · 12 years ago
  23. a8b289b Initial implementation of PPCTargetTransformInfo by Hal Finkel · 12 years ago
  24. ee7c0d2 Add support for applying in-memory relocations to the .debug_line section and, in the case of ELF files, using symbol addresses when available for relocations to the .debug_info section. Also extending the llvm-rtdyld tool to add the ability to dump line number information for testing purposes. by Andrew Kaylor · 12 years ago
  25. 1eb5aea XFAIL close-stderr on win32 by Reid Kleckner · 12 years ago
  26. 2f67dc9 Set the +x bit on two batch scripts by Reid Kleckner · 12 years ago
  27. ce98f09 FileCheck-ify some grep tests by Reid Kleckner · 12 years ago
  28. a5597f0 In this patch, we teach X86_64TargetMachine that it has a ILP32 by Eli Bendersky · 12 years ago
  29. a326298 Add back a RUN line removed by mistake by a previous commit by Eli Bendersky · 12 years ago
  30. c47bd98 Add instruction encodings / disassembly support for l4r instructions. by Richard Osborne · 12 years ago
  31. 767295f Now that llvm-dwarfdump supports flags to specify which DWARF section to dump, by Eli Bendersky · 12 years ago
  32. 4f070b0 Improve the !add TableGen test case. by Hal Finkel · 12 years ago
  33. 939a4e8 Add command-line flags for DWARF dumping. by Eli Bendersky · 12 years ago
  34. 3b6a5ee Add instruction encodings / disassembly support for l5r instructions. by Richard Osborne · 12 years ago
  35. 351f65d [msan] Implement exact shadow propagation for relational ICmp. by Evgeniy Stepanov · 12 years ago
  36. d23a41c Add an addition operator to TableGen by Hal Finkel · 12 years ago
  37. 4a9256f Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the sutraction of the higher 32 bit parts gives a 0 result, we need to do the store operation. by Silviu Baranga · 12 years ago
  38. 4e1fb18 MIsched: Improve the interface to SchedDFS analysis (subtrees). by Andrew Trick · 12 years ago
  39. baf868b Switch this code away from Value::isUsedInBasicBlock. That code either by Chandler Carruth · 12 years ago
  40. 178f7d0 MISched: Add SchedDFSResult to ScheduleDAGMI to formalize the by Andrew Trick · 12 years ago
  41. 801c583 This patch implements parsing the .word directive for the Mips assembler. by Jack Carter · 12 years ago
  42. d2047c6 [mips] Set flag neverHasSideEffects flag on some of the floating point instructions. by Akira Hatanaka · 12 years ago
  43. d5a80c7 Reapply chandlerc's r173342 now that the miscompile it was triggering is fixed. by Benjamin Kramer · 12 years ago
  44. e574246 ConstantFolding: Add a missing folding that leads to a miscompile. by Benjamin Kramer · 12 years ago
  45. eacef32 Revert r173342 temporarily. It appears to cause a very late miscompile by Chandler Carruth · 12 years ago
  46. 1f25541 Plug TTI into the speculation logic, giving it a real cost interface by Chandler Carruth · 12 years ago
  47. 47d8f6d Address a large chunk of this FIXME by accumulating the cost for by Chandler Carruth · 12 years ago
  48. 681add7 Switch the constant expression speculation cost evaluation away from by Chandler Carruth · 12 years ago
  49. 63f0846 [asan] adaptive redzones for globals (the larger the global the larger is the redzone) by Kostya Serebryany · 12 years ago
  50. 8453b3f The next phase of Mips16 hard float implementation. by Reed Kotler · 12 years ago
  51. b4d201ec ConstantFolding: Evaluate GEP indices in the index type. by Benjamin Kramer · 12 years ago
  52. 9e6a5a3 Add instruction encodings / disassembly support for l6r instructions. by Richard Osborne · 12 years ago
  53. 028dba3 Revert "InstCombine: Clean up weird code that talks about a modulus that's long gone." by Benjamin Kramer · 12 years ago
  54. e4957fb Add the heuristic to differentiate SSPStrong from SSPRequired. by Bill Wendling · 12 years ago
  55. 114baee Add the IR attribute 'sspstrong'. by Bill Wendling · 12 years ago
  56. f148c66 by Nadav Rotem · 12 years ago
  57. 0ec35ac Add instruction encodings / disassembly support for u10 / lu10 instructions. by Richard Osborne · 12 years ago
  58. 13d08bf Fix an issue of pseudo atomic instruction DAG schedule by Michael Liao · 12 years ago
  59. 221514e Add a warning when there is a macro defintion that has named parameters but by Kevin Enderby · 12 years ago
  60. a88322c [mips] Implement MipsRegisterInfo::getRegPressureLimit. by Akira Hatanaka · 12 years ago
  61. 5de048e Have the integrated assembler give an error if $1 is used as an identifier in by Kevin Enderby · 12 years ago
  62. aaf483f Add forgotten test case for the x32 commit by Eli Bendersky · 12 years ago
  63. 341c5fb X86: Make sure we account for the FMA4 register immediate value, otherwise rip-rel relocations will be off by one byte. by Benjamin Kramer · 12 years ago
  64. 91df03b Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a ModuleID by Dmitri Gribenko · 12 years ago
  65. 4247b13 [msan] Do not insert check on volatile store. by Evgeniy Stepanov · 12 years ago
  66. fc8d1dd This test is only supposed to test that the objc-arc alias analysis by Michael Gottesman · 12 years ago
  67. 8492096 [MC/Mach-O] Load commands are supposed to 8-byte aligned on 64-bit. by Daniel Dunbar · 12 years ago
  68. ea0e78a Remove target triple from an LSR test. by Andrew Trick · 12 years ago
  69. 8e52810 Transform (sub 0, (zext bool to A)) to (sext bool to A) and by Paul Redmond · 12 years ago
  70. 8da5434 Add instruction encodings / disassembly support for u6 / lu6 instructions. by Richard Osborne · 12 years ago
  71. 9b709f8 Add instruction encoding / disassembly support for ru6 / lru6 instructions. by Richard Osborne · 12 years ago
  72. b853c41 Add instruction encodings / disassembly support for l2rus instructions. by Richard Osborne · 12 years ago
  73. c78ec6b Add instruction encodings / disassembly support for l3r instructions. by Richard Osborne · 12 years ago
  74. a68c64f Add instruction encodings / disassembler support for 2rus instructions. by Richard Osborne · 12 years ago
  75. 62b8786 Add instruction encodings / disassembly support 3r instructions. by Richard Osborne · 12 years ago
  76. 1340833 llvm/test/CodeGen/X86/win_ftol2.ll: Add -cpu=generic to appease valgrind. by NAKAMURA Takumi · 12 years ago
  77. 0c8607b by Nadav Rotem · 12 years ago
  78. 0bbbc52 LoopVectorizer: Implement a new heuristics for selecting the unroll factor. by Nadav Rotem · 12 years ago
  79. bcdabad Change the cpu type in the test. by Nadav Rotem · 12 years ago
  80. fe311db llvm/test/Other/close-stderr.ll: Mark this as XFAIL:valgrind. We got 127 instead of 1 here. by NAKAMURA Takumi · 12 years ago
  81. 1426841 The last of PR14471 - emission of constant floats by David Blaikie · 12 years ago
  82. fe07db3 Fix a latent bug exposed by recent static member debug info changes. by David Blaikie · 12 years ago
  83. 1af132d LoopVectorizer: Emit memory checks into their own basic block. by Benjamin Kramer · 12 years ago
  84. ba95865 On Sandybridge split unaligned 256bit stores into two xmm-sized stores. by Nadav Rotem · 12 years ago
  85. d32eea9 Remove some register allocation order dependencies. by Jakob Stoklund Olesen · 12 years ago
  86. 48177ac On Sandybridge loading unaligned 256bits using two XMM loads (vmovups and vinsertf128) is faster than using a single vmovups instruction. by Nadav Rotem · 12 years ago
  87. 0969ddf Split out DW_OP_addr for the split debug info DWARF5 proposal. by Eric Christopher · 12 years ago
  88. c91cbb9 This is a resubmittal. For some reason it broke the bots yesterday by Jack Carter · 12 years ago
  89. e72fac6 This is a resubmittal. For some reason it broke the bots yesterday by Jack Carter · 12 years ago
  90. 6d49b68 [MC/Mach-O] Implement integrated assembler support for linker options. by Daniel Dunbar · 12 years ago
  91. ca81374 llvm/test/CodeGen/X86/Atomics-64.ll: Tweak for 2nd RUN not to overwrite %t. It sometimes causes spurious failure on lit win32. by NAKAMURA Takumi · 12 years ago
  92. a94c339 [MC/Mach-O] Add support for linker options in Mach-O files. by Daniel Dunbar · 12 years ago
  93. cddd236 [MC/Mach-O] Add AsmParser support for .linker_option directive. by Daniel Dunbar · 12 years ago
  94. 167ede8 Reverting r171325 & r172363. This was causing a mis-compile on the self-hosted LTO build bots. by Bill Wendling · 12 years ago
  95. d69a43a Restore reverted test case, this time with REQUIRES: asserts by Bill Schmidt · 12 years ago
  96. c087dcf Remove bad test case by Bill Schmidt · 12 years ago
  97. 8f4ee4b This patch fixes PR13626 by providing i128 support in the return by Bill Schmidt · 12 years ago
  98. a454ffd Add indexed load/store instructions for offset validation check. by Jyotsna Verma · 12 years ago
  99. 792b123 This patch fixes the PPC calling convention to handle returns of by Bill Schmidt · 12 years ago
  100. 6c327f9 Optimization for the following SIGN_EXTEND pairs: by Elena Demikhovsky · 12 years ago