1. 2426775 don't use "ordinary" addressing mode 1 when mvn is appropriate by Rafael Espindola · 19 years ago
  2. f64945d use MVN to handle small negative constants by Rafael Espindola · 19 years ago
  3. f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 19 years ago
  4. 97815c6 expand memmove and memcpy by Rafael Espindola · 19 years ago
  5. 462af9a add support for the "r" asm constraint patch by Lauro Ramos Venancio by Rafael Espindola · 19 years ago
  6. f819a49 implement load effective address similar to the alpha backend by Rafael Espindola · 19 years ago
  7. 0d53826 Match tblegen changes. by Evan Cheng · 19 years ago
  8. 6e8c649 initial implementation of addressing mode 2 TODO: fix lea_addri by Rafael Espindola · 19 years ago
  9. e931a37 move ARMCondCodeToString to ARMAsmPrinter.cpp by Rafael Espindola · 19 years ago
  10. c35497f All targets expand BR_JT for now. by Evan Cheng · 19 years ago
  11. 7ae68ab initial support for frame pointers by Rafael Espindola · 19 years ago
  12. 0e5e3aa expand ISD::VACOPY by Rafael Espindola · 19 years ago
  13. d8ed7f8 expand ISD::MEMSET by Rafael Espindola · 19 years ago
  14. b83eb64 For PR950: by Reid Spencer · 19 years ago
  15. 6495bdd expand SIGN_EXTEND_INREG by Rafael Espindola · 19 years ago
  16. 4749aa4 expand brind so that we don't have to implement jump tables right now by Rafael Espindola · 19 years ago
  17. 5f1b698 implement CallingConv::Fast as CallingConv::C by Rafael Espindola · 19 years ago
  18. 226f8bc expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM by Rafael Espindola · 19 years ago
  19. 32bd5f4 initial implementation of addressing mode 5 by Rafael Espindola · 19 years ago
  20. 0505be0 expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS by Rafael Espindola · 19 years ago
  21. d2b5668 expand ISD::BRCOND by Rafael Espindola · 19 years ago
  22. 6c5ae3e fix some fp condition codes use non trapping comparison instructions by Rafael Espindola · 19 years ago
  23. 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
  24. 26a76d1 implement calls to functions that return long by Rafael Espindola · 19 years ago
  25. 42b62f3 implement unordered floating point compares by Rafael Espindola · 19 years ago
  26. 493a7fc uint <-> double conversion by Rafael Espindola · 19 years ago
  27. b47e1d0 add double <-> int conversion by Rafael Espindola · 19 years ago
  28. 0d9fe76 compare doubles by Rafael Espindola · 19 years ago
  29. 4b20fbc initial support for fp compares. Unordered compares not implemented yet by Rafael Espindola · 19 years ago
  30. 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
  31. 48bc9fb expand ISD::SELECT by Rafael Espindola · 19 years ago
  32. ad557f9 expand ISD::EXTLOAD by Rafael Espindola · 19 years ago
  33. e5bbd6d implement FUITOS and FUITOD by Rafael Espindola · 19 years ago
  34. 935b1f8 add optional input flag to FMRRD by Rafael Espindola · 19 years ago
  35. 614057b add support for calling functions that return double by Rafael Espindola · 19 years ago
  36. af1dabe fix some bugs affecting functions with no arguments by Rafael Espindola · 19 years ago
  37. 4a408d4 add support for calling functions that have double arguments by Rafael Espindola · 19 years ago
  38. 786225a Make use of getStore(). by Evan Cheng · 19 years ago
  39. 39b5a21 use a const ref for passing the vector to ArgumentLayout by Rafael Espindola · 19 years ago
  40. a284584 implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL by Rafael Espindola · 19 years ago
  41. cd71da5 Implement floating point constants by Rafael Espindola · 19 years ago
  42. 9e071f0 fix the names of the 64bit fp register by Rafael Espindola · 19 years ago
  43. 2718519 add floating point registers implement SINT_TO_FP by Rafael Espindola · 19 years ago
  44. ebdabda more condition codes by Rafael Espindola · 19 years ago
  45. 7246d33 if a constant can't be an immediate, add it to the constant pool by Rafael Espindola · 19 years ago
  46. 3ad5e5c add shifts to addressing mode 1 by Rafael Espindola · 19 years ago
  47. c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 19 years ago
  48. 1b3956b add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 by Rafael Espindola · 19 years ago
  49. 7cca7c5 partial implementation of the ARM Addressing Mode 1 by Rafael Espindola · 19 years ago
  50. 3a02f02 add support for returning 64bit values by Rafael Espindola · 19 years ago
  51. bc4cec9 add the SETULT condition code by Rafael Espindola · 19 years ago
  52. 5f450d2 add more condition codes by Rafael Espindola · 19 years ago
  53. 9ade218 Select() no longer require Result operand by reference. by Evan Cheng · 19 years ago
  54. 755be9b use @ for comments by Rafael Espindola · 19 years ago
  55. cdda88c add the "eq" condition code implement a movcond instruction by Rafael Espindola · 19 years ago
  56. 6f602de create a generic bcond instruction that has a conditional code argument by Rafael Espindola · 19 years ago
  57. 687bc49 initial support for branches by Rafael Espindola · 19 years ago
  58. 3c000bf initial support for select by Rafael Espindola · 19 years ago
  59. 3717ca9 call computeRegisterProperties by Rafael Espindola · 19 years ago
  60. f3a335c add a "load effective address" by Rafael Espindola · 19 years ago
  61. ec46ea3 Declare the callee saved regs by Rafael Espindola · 19 years ago
  62. 61369da select code like ldr rx, [ry, #offset] by Rafael Espindola · 19 years ago
  63. e219945 Eliminate use of getNode that takes a vector. by Chris Lattner · 19 years ago
  64. 8742867 elimiante use of getNode that takes vector of operands. by Chris Lattner · 19 years ago
  65. 64a752f Match tablegen changes. by Evan Cheng · 19 years ago
  66. 7a53bd0 fix the spill code by Rafael Espindola · 19 years ago
  67. 1a00946 initial support for variable number of arguments by Rafael Espindola · 19 years ago
  68. 2ef88a0 Match tablegen isel changes. by Evan Cheng · 19 years ago
  69. 341b864 use a 'register pressure reducing' scheduler by Rafael Espindola · 19 years ago
  70. 6312da0 Bug fix: always generate a RET_FLAG in LowerRET fixes ret_null.ll and call.ll by Rafael Espindola · 19 years ago
  71. f4fda80 add and use ARMISD::RET_FLAG by Rafael Espindola · 19 years ago
  72. 06c1e7e implement LowerConstantPool and LowerGlobalAddress by Rafael Espindola · 19 years ago
  73. 2641cad Remove InFlightSet hack. No longer needed. by Evan Cheng · 19 years ago
  74. fac00a9 implement function calling of functions with up to 4 arguments by Rafael Espindola · 19 years ago
  75. 84b19be skeleton of a lowerCall implementation for ARM by Rafael Espindola · 19 years ago
  76. a4e6435 add the memri memory operand by Rafael Espindola · 19 years ago
  77. aefe142 create the raddr addressing mode that matches any register and the frame index by Rafael Espindola · 19 years ago
  78. 49e4415 handle the "mov reg1, reg2" case in isMoveInstr by Rafael Espindola · 19 years ago
  79. 337c4ad6 lower more then 4 formal arguments. The offset is currently hard coded. by Rafael Espindola · 19 years ago
  80. 4b02367 add R0 to liveout by Rafael Espindola · 19 years ago
  81. 85ede37 Expand ret into "CopyToReg;BRIND" by Rafael Espindola · 19 years ago
  82. 6848be1 Change RET node to include signness information of the return values. i.e. by Evan Cheng · 19 years ago
  83. c3c1a86 port the ARM backend to use ISD::CALL instead of LowerCallTo by Rafael Espindola · 19 years ago
  84. 6a3d5a6 Assert if InflightSet is not cleared after instruction selecting a BB. by Evan Cheng · 19 years ago
  85. afe358e Clear HandleMap and ReplaceMap after instruction selection. Or it may cause by Evan Cheng · 19 years ago
  86. d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 19 years ago
  87. 4b442b5 implement minimal versions of by Rafael Espindola · 19 years ago
  88. dc124a2 implement movri add a stub LowerFORMAL_ARGUMENTS by Rafael Espindola · 19 years ago
  89. 1c8f053 add an abort after every assert(0) by Rafael Espindola · 19 years ago
  90. 7bc59bc added a skeleton of the ARM backend by Rafael Espindola · 19 years ago