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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 56594f98848ac6d1885662644b5652c04c0d0831 / lib / Target / PowerPC / PPCISelDAGToDAG.cpp
  1. c5b19b2 Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many by Daniel Dunbar · 16 years ago
  2. 933c762 Manage MachineFunctions with an analysis Pass instead of the Annotable by Dan Gohman · 16 years ago
  3. c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
  4. c25e758 assert(0) -> LLVM_UNREACHABLE. by Torok Edwin · 16 years ago
  5. dac237e Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 16 years ago
  6. 9062d9a Fix some failures in targets on available_externally functions, by Chris Lattner · 16 years ago
  7. 536a2f1 Remove refs to non-DebugLoc version of BuildMI from PowerPC. by Dale Johannesen · 17 years ago
  8. f902d24 fix PR3538 for PPC by Chris Lattner · 17 years ago
  9. f5f5dce Eliminate remaining non-DebugLoc version of getTargetNode. by Dale Johannesen · 17 years ago
  10. ed2eee6 Get rid of one more non-DebugLoc getNode and by Dale Johannesen · 17 years ago
  11. a05dca4 Remove non-DebugLoc forms of CopyToReg and CopyFromReg. Adjust callers. by Dale Johannesen · 17 years ago
  12. c1a168a Fix 80 col violations. by Evan Cheng · 17 years ago
  13. 5fc742d Handle ISD::DECLARE with PIC relocation model. by Evan Cheng · 17 years ago
  14. ee5c2b8 Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's. by Evan Cheng · 17 years ago
  15. fc54c55 Generalize the HazardRecognizer interface so that it can be used by Dan Gohman · 17 years ago
  16. 79ce276 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph by Dan Gohman · 17 years ago
  17. 53e4e44 Make FP tests requiring two compares work on PPC (PR 642). by Dale Johannesen · 17 years ago
  18. cbb7ab2 Reintroduce a comment that was removed with the AddToISelQueue changes. by Dan Gohman · 17 years ago
  19. 8be6bbe Eliminate the ISel priority queue, which used the topological order for a by Dan Gohman · 17 years ago
  20. 8ad4c00 by David Greene · 17 years ago
  21. f522068 Trim #includes. by Dan Gohman · 17 years ago
  22. da8ac5f Avoid creating two TargetLowering objects for each target. by Dan Gohman · 17 years ago
  23. f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 17 years ago
  24. 6448d91 Clean up uses of TargetLowering::getTargetMachine. by Dan Gohman · 17 years ago
  25. 93c53e5 fix a bunch of 80-col violations by Gabor Greif · 17 years ago
  26. ba36cb5 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics by Gabor Greif · 17 years ago
  27. f350b27 Move the point at which FastISel taps into the SelectionDAGISel by Dan Gohman · 17 years ago
  28. ad3460c Simplify SelectRoot's interface, and factor out some common code by Dan Gohman · 17 years ago
  29. 475871a Rename SDOperand to SDValue. by Dan Gohman · 17 years ago
  30. e8be6c6 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk by Dan Gohman · 17 years ago
  31. 1002c02 Add explicit keywords. by Dan Gohman · 17 years ago
  32. db8d56b Split scheduling from instruction selection. by Evan Cheng · 17 years ago
  33. 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 17 years ago
  34. b3564aa Convert the last remaining users of the non-APInt form of by Dan Gohman · 17 years ago
  35. 7c1c261 Remove bunch of gcc 4.3-related warnings from Target by Anton Korobeynikov · 17 years ago
  36. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  37. 4e3f5a4 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. by Evan Cheng · 18 years ago
  38. a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
  39. b625f2f Factor the addressing mode and the load/store VT out of LoadSDNode by Dan Gohman · 18 years ago
  40. fe39edd Finally implement correct ordered comparisons for PPC, even though by Chris Lattner · 18 years ago
  41. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
  42. 349c495 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor by Chris Lattner · 18 years ago
  43. 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
  44. 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  45. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  46. 152b7e1 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64. by Evan Cheng · 18 years ago
  47. 2bda17c Prevent PPC::BCC first operand, the PRED number, from being isel'd into a LI instruction. by Evan Cheng · 18 years ago
  48. ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
  49. aa43e9f Fix a bug which caused us to never be able to use signed comparisons for by Chris Lattner · 18 years ago
  50. 95b2c7d eliminate static ctors for Statistic objects. by Chris Lattner · 19 years ago
  51. 78f97f3 Reduce number of instructions to load 64-bit constants. by Jim Laskey · 19 years ago
  52. f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 19 years ago
  53. ac0b6ae Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 19 years ago
  54. c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
  55. 18258c6 convert PPC::BCC to use the 'pred' operand instead of separate predicate by Chris Lattner · 19 years ago
  56. 289c2d5 rename PPC::COND_BRANCH to PPC::BCC by Chris Lattner · 19 years ago
  57. df4ed63 start using PPC predicates more consistently. by Chris Lattner · 19 years ago
  58. 74531e4 add patterns for ppc32 preinc stores. ppc64 next. by Chris Lattner · 19 years ago
  59. 0851b4f fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri by Chris Lattner · 19 years ago
  60. d104342 remove a ton of custom selection logic no longer needed by Chris Lattner · 19 years ago
  61. 5b3bbc7 allow the offset of a preinc'd load to be the low-part of a global. This by Chris Lattner · 19 years ago
  62. 94e509c implement preinc support for r+i loads on ppc64 by Chris Lattner · 19 years ago
  63. 4eab714 add an initial cut at preinc loads for ppc32. This is broken for ppc64 by Chris Lattner · 19 years ago
  64. 0d53826 Match tblegen changes. by Evan Cheng · 19 years ago
  65. fc5b1ab Refactor all the addressing mode selection stuff into the isel lowering by Chris Lattner · 19 years ago
  66. 3ed469c For PR786: by Reid Spencer · 19 years ago
  67. 1d75400 fix miscompilation of llvm.isunordered, where we branched on the opposite by Chris Lattner · 19 years ago
  68. f42f133 Fold AND and ROTL more often by Nate Begeman · 19 years ago
  69. 7117624 Improve PPC64 equality comparisons like PPC32 comparisons. by Chris Lattner · 19 years ago
  70. 3836dbd Two improvements: by Chris Lattner · 19 years ago
  71. a4f0b3a s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| by Chris Lattner · 19 years ago
  72. 0b828e0 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 by Evan Cheng · 19 years ago
  73. 95514ba SelectNodeTo now returns a SDNode*. by Evan Cheng · 19 years ago
  74. 9ade218 Select() no longer require Result operand by reference. by Evan Cheng · 19 years ago
  75. 6da2f32 Match tblgen changes. by Evan Cheng · 19 years ago
  76. ccbe2ec Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code. by Chris Lattner · 19 years ago
  77. 64a752f Match tablegen changes. by Evan Cheng · 19 years ago
  78. bd564bf Start eliminating temporary vectors used to create DAG nodes. Instead, pass by Chris Lattner · 19 years ago
  79. 2ef88a0 Match tablegen isel changes. by Evan Cheng · 19 years ago
  80. 2641cad Remove InFlightSet hack. No longer needed. by Evan Cheng · 19 years ago
  81. 33e9ad9 Remove NodeDepth by Evan Cheng · 19 years ago
  82. 2a41a98 shrink libllvmgcc.dylib another 25K by Chris Lattner · 19 years ago
  83. cccef1c Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) by Chris Lattner · 19 years ago
  84. 6b76b96 Fix ppc64 jump tables by Chris Lattner · 19 years ago
  85. 529c233 Fix variable shadowing issue by Chris Lattner · 19 years ago
  86. c08f902 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but by Chris Lattner · 19 years ago
  87. cf00631 Work around a nasty tblgen bug where it doesn't add operands for varargs by Chris Lattner · 19 years ago
  88. 8e2a04e Fix build failure of povray by Chris Lattner · 19 years ago
  89. 5d634ce Fix Benchmarks/MallocBench/cfrac by Chris Lattner · 19 years ago
  90. 6a3d5a6 Assert if InflightSet is not cleared after instruction selecting a BB. by Evan Cheng · 19 years ago
  91. afe358e Clear HandleMap and ReplaceMap after instruction selection. Or it may cause by Evan Cheng · 19 years ago
  92. c703a8f Make PPC call lowering more aggressive, making the isel matching code simple by Chris Lattner · 19 years ago
  93. 9a2a497 Switch PPC over to a call-selection model where the lowering code creates by Chris Lattner · 19 years ago
  94. c04ba7a implement passing/returning vector regs to calls, at least non-varargs calls. by Chris Lattner · 19 years ago
  95. 0949ed5 Fix PowerPC/2006-05-12-rlwimi-crash.ll by Chris Lattner · 19 years ago
  96. 4667f2c Fold more shifts into inserts, and update the README by Nate Begeman · 19 years ago
  97. 93376b0 Update some stuff now that the new rlwimi code has gone in by Nate Begeman · 19 years ago
  98. 77f361f New rlwimi implementation, which is superior to the old one. There are by Nate Begeman · 19 years ago
  99. 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 19 years ago
  100. 710ff32 Add VRRC select support by Chris Lattner · 19 years ago