- 5f93e2b Add a context so that once we uniquify strings we can access them easily. by Bill Wendling · 12 years ago
- fbf3b4a MC: Add MCInstrDesc::mayAffectControlFlow() method. by Jim Grosbach · 12 years ago
- f846f16 Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID(). by Michael Ilseman · 12 years ago
- 18e7211 s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList. by Bill Wendling · 12 years ago
- 344df79 Add a missing 'else'. Found by grep '} if' by Dmitri Gribenko · 12 years ago
- 45f75be R600: Remove unecessary VREG alignment. by Tom Stellard · 12 years ago
- d09d43a R600: control flow optimization by Tom Stellard · 12 years ago
- 6b7d99d R600: New control flow for SI v2 by Tom Stellard · 12 years ago
- 6eebe47 Split out abbreviations for the skeleton info from the rest of by Eric Christopher · 12 years ago
- 37a942c Remove the explicit MachineInstrBuilder(MI) constructor. by Jakob Stoklund Olesen · 12 years ago
- 521396a Fix a bug that was found by building clang with -fsanitize. by Nadav Rotem · 12 years ago
- 733c6b1 LLVM sdisel normalize bit extraction of the form: by Evan Cheng · 12 years ago
- 759e3fa Remove edis - the enhanced disassembler. Fixes PR14654. by Roman Divacky · 12 years ago
- 6da2e22 Transform (x&C)>V into (x&C)!=0 where possible by Paul Redmond · 12 years ago
- 91223a4 PowerPC: Expand VSELECT nodes. by Benjamin Kramer · 12 years ago
- c698d3a Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- cd7ee1c Revert 170545 while I debug the ppc failures. by Rafael Espindola · 12 years ago
- f9a6bd8 Add r170095 back. by Rafael Espindola · 12 years ago
- 33660cd [msan] Add track-origins argument to the pass constructor. by Evgeniy Stepanov · 12 years ago
- b9e12e5 Split the usage of 'EVT PartVT' into 'MVT PartVT' and 'EVT PartEVT'. by Patrik Hagglund · 12 years ago
- 8963fec Change RegVT in BitTestBlock and RegsForValue, to contain MVTs, instead of EVTs. by Patrik Hagglund · 12 years ago
- e5c6591 Change TargetLowering::getTypeForExtArgOrReturn to take and return by Patrik Hagglund · 12 years ago
- ee211d2 Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT, from EVT. by Patrik Hagglund · 12 years ago
- dfcf33a Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of EVTs. by Patrik Hagglund · 12 years ago
- ff01277 Change TargetLowering::TransformToType to contain MVTs, instead of EVTs. by Patrik Hagglund · 12 years ago
- 0340557 Change TargetLowering::findRepresentativeClass to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- b8837ab [msan] Heuristically instrument unknown intrinsics. by Evgeniy Stepanov · 12 years ago
- 319bb39 Change TargetLowering::getTypeToPromoteTo to take and return MVTs, by Patrik Hagglund · 12 years ago
- 8b7c89f LoopVectorize: Make iteration over induction variables not depend on pointer values. by Benjamin Kramer · 12 years ago
- fdbeb05 Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 1653741 X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses] by NAKAMURA Takumi · 12 years ago
- 9c5ab93 Change TargetLowering::getCondCodeAction to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 6424a78 Inline hasFunctionOnlyAttrs into its only use. by Bill Wendling · 12 years ago
- 5d122b6 Inline the only use of the hasParameterOnlyAttrs method. by Bill Wendling · 12 years ago
- 1d3dcfe Inline the 'hasIncompatibleWithVarArgsAttrs' method into its only uses. And some minor comment reformatting. by Bill Wendling · 12 years ago
- 88ef514 Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs. by Patrik Hagglund · 12 years ago
- 4b97731 Optimized load + SIGN_EXTEND patterns in the X86 backend. by Elena Demikhovsky · 12 years ago
- bf5a2c6 After reducing the size of an operation in the DAG we zero-extend the reduced by Nadav Rotem · 12 years ago
- 034b94b Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future. by Bill Wendling · 12 years ago
- 8502256 Remove more of 'else's after 'returns'. No functional change. by Craig Topper · 12 years ago
- a1b3c03 Remove a bunch of 'else's after 'returns' by Craig Topper · 12 years ago
- 40b4a81 Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition. by Craig Topper · 12 years ago
- 95f475f Add some missing Defs and Uses. by Reed Kotler · 12 years ago
- d6b51d1 Make sure the buffer, which containas an instance of APFloat, has proper alignment. by Shuxin Yang · 12 years ago
- 5469f60 Add to the disassembler C API an option to print the disassembled by Kevin Enderby · 12 years ago
- 2e4b639 Use bidirectional bundle flags to simplify important functions. by Jakob Stoklund Olesen · 12 years ago
- 1a31500 rdar://12801297 by Shuxin Yang · 12 years ago
- 62570c2 Enable the loop vectorizer in clang and not in the pass manager, so that we can disable it in clang. by Nadav Rotem · 12 years ago
- 582abdd Verify bundle flag consistency when setting them. by Jakob Stoklund Olesen · 12 years ago
- 270bfbd Reverse order of checking SSE level when calculating compare cost, so we check by Jakub Staszak · 12 years ago
- 9466bde Verify bundle flags for consistency in MachineVerifier. by Jakob Stoklund Olesen · 12 years ago
- b519351 Disable ARM partial flag dependency optimization at -Oz by Quentin Colombet · 12 years ago
- bd7b36e Don't allow the automatically updated MI flags to be set directly. by Jakob Stoklund Olesen · 12 years ago
- 9b04104 Tighten up the splice() API for bundled instructions. by Jakob Stoklund Olesen · 12 years ago
- 04f52e1 MISched: add dependence to ExitSU to model live-out latency. by Andrew Trick · 12 years ago
- e3eddae MISched: Cleanup, redundant statement. by Andrew Trick · 12 years ago
- 44fd0bc MISched: Heuristics, compare latency more precisely. It matters more for some targets. by Andrew Trick · 12 years ago
- 9c676c2 MISched: Remove SchedRemainder::IsResourceLimited. I don't know how to compute it. by Andrew Trick · 12 years ago
- d453960 MISched: cleanup, use the proper iterator type. by Andrew Trick · 12 years ago
- 071966f MISched: minor improvement, initialize remaining resources before the first scheduling decision. by Andrew Trick · 12 years ago
- 0ef0e2e LoopVectorize: Emit reductions as log2(vectorsize) shuffles + vector ops instead of scalar operations. by Benjamin Kramer · 12 years ago
- 968b667 Get rid of the pesky -Woverloaded-virtual warning. No change in functionality. by Eli Bendersky · 12 years ago
- edc3503 Tighten the insert() API for bundled instructions. by Jakob Stoklund Olesen · 12 years ago
- ca2dd36 Check multiple register classes for inline asm tied registers by Hal Finkel · 12 years ago
- 04b116e Enable the loop vectorizer. by Nadav Rotem · 12 years ago
- e21708e SROA: Replace calls to getScalarSizeInBits to DataLayout's API because by Nadav Rotem · 12 years ago
- f209dea Initialize NoRedZone and remove unused default values. by Rafael Espindola · 12 years ago
- bcc9a89 Repair bundles that were broken by removing and reinserting the first by Jakob Stoklund Olesen · 12 years ago
- d57a598 Formatting. by Eric Christopher · 12 years ago
- 6c58314 Add support for passing -main-file-name all the way through to the assembler. by Eric Christopher · 12 years ago
- 2318ba1 Cleanup formatting and whitespace. by Eric Christopher · 12 years ago
- 8413d2c Extract a method, no functional change intended. by Jakob Stoklund Olesen · 12 years ago
- 9f4692d Tighten up the erase/remove API for bundled instructions. by Jakob Stoklund Olesen · 12 years ago
- 082b7e6 EmitDebugLabel should by default be the same as EmitLabel everywhere. by Reed Kotler · 12 years ago
- 14b8f79 fix indentation by Eli Bendersky · 12 years ago
- 6290b93 [arm fast-isel] Minor cleanup. No functional change intended. by Chad Rosier · 12 years ago
- 6c31d31 Prepare LLVM to fix PR14625, exposing a hook in MCContext to manage the by Chandler Carruth · 12 years ago
- 0f47e7e Removed trailing whitespace by Michael Ilseman · 12 years ago
- 316a5aa [arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary by Chad Rosier · 12 years ago
- b0de1e3 Fix another SROA crasher, PR14601. by Chandler Carruth · 12 years ago
- 7882213 Query section for whether it should be executable. by Tim Northover · 12 years ago
- 1c2b2f9 Teach MachO which sections contain code by Tim Northover · 12 years ago
- 2dfa3eb [msan] Fix lint warning. by Evgeniy Stepanov · 12 years ago
- c47793c Add instruction encodings / disassembly support for l2r instructions. by Richard Osborne · 12 years ago
- 9f84c05 R600: enable S_*N2_* instructions by Tom Stellard · 12 years ago
- 3ee6391 R600: BB operand support for SI by Tom Stellard · 12 years ago
- ab8ada3 R600: remove nonsense setPrefLoopAlignment by Tom Stellard · 12 years ago
- 99a5494 Teach the rewriting of memcpy calls to support subvector copies. by Chandler Carruth · 12 years ago
- 3d170e6 Revert/correct some FastISel changes in r170104 (EVT->MVT for by Patrik Hagglund · 12 years ago
- 1794814 Optimize tree walking in markAliveBlocks. by Evgeniy Stepanov · 12 years ago
- a839ffc Add instruction encodings for PEEK and ENDIN. by Richard Osborne · 12 years ago
- 8bbff23 Fix a secondary bug I introduced while fixing the first part of PR14478. by Chandler Carruth · 12 years ago
- 6e43b7f Fix parameter name in prototypes in XCoreDisassembler. by Richard Osborne · 12 years ago
- 5814a88 Hoist a convertValue call to the two paths where it is needed. by Chandler Carruth · 12 years ago
- 35150cb Add instruction encodings / disassembly support for rus instructions. by Richard Osborne · 12 years ago
- 7f7d201 Hoist the insertVector helper to be a static helper. by Chandler Carruth · 12 years ago
- ff6114e Add instruction encodings for ZEXT and SEXT. by Richard Osborne · 12 years ago
- 5c531eb Lift the extractVector helper all the way out to a static helper function. by Chandler Carruth · 12 years ago
- 8ab1efd Factor the vector load rewriting into a more generic form. by Chandler Carruth · 12 years ago
- 1ffe48a Add instruction encodings / disassembly support for 2r instructions. by Richard Osborne · 12 years ago