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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 61e22cd85cd4c84fff391da67018c92bf21a8e19
  1. 61e22cd [llvm.py] Implement interface to object files by Gregory Szorc · 12 years ago
  2. 51cf866 Fix uses of the C99 PRI format macros not to conflict with C++11 UDLs. by Benjamin Kramer · 12 years ago
  3. ff0275e Report the defining instruction. by Jakob Stoklund Olesen · 12 years ago
  4. 64ffa83 Add SSA verification to MachineVerifier. by Jakob Stoklund Olesen · 12 years ago
  5. 1efd6b9 Use SmallPtrSet instead of DenseSet. by Jakob Stoklund Olesen · 12 years ago
  6. d5f7690 Give dagcombiner's worklist some inline capacity. by Benjamin Kramer · 12 years ago
  7. d229b7b Do not custom lower i64 nodes if i64 is not a legal type. Move lines that set by Akira Hatanaka · 12 years ago
  8. 0a40c23 Lower SETCC nodes during legalization. Previously, it was lowered in DAG combine pass. by Akira Hatanaka · 12 years ago
  9. 9ab3dbe Assert on SSA errors in LiveVariables. by Jakob Stoklund Olesen · 12 years ago
  10. 6e1beea Remove unused header files. by Akira Hatanaka · 12 years ago
  11. fe4d6df misched: handle scheduler that insert instructions at empty region boundaries. by Andrew Trick · 12 years ago
  12. 58dfaa1 Add the missing call to Error when a bad X86 scale expression is parsed. by Kevin Enderby · 12 years ago
  13. 2d70e26 Support reading GNU symbol versions in ELFObjectFile by David Meyer · 12 years ago
  14. 6f9489a [Object] by David Meyer · 12 years ago
  15. a8eb6bb Add statistics on removed switch cases, and fix the phi statistic by Duncan Sands · 12 years ago
  16. 07c3221 [llvm.py] Make ObjectFile destructor work by Gregory Szorc · 12 years ago
  17. 5992f67 When identifying exit nodes for the reverse-CFG reverse-post-order by Dan Gohman · 12 years ago
  18. faf72ff Fix the x86 disassembler to at least print the lock prefix if it is the first by Kevin Enderby · 12 years ago
  19. 75c0d8e [Support] Drop verbose _ATTRIBUTE from LLVM_ATTRIBUTE_{READONLY,READNONE} macro by Daniel Dunbar · 12 years ago
  20. 89d8139 TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask. by NAKAMURA Takumi · 12 years ago
  21. 63054f9 test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets. by NAKAMURA Takumi · 12 years ago
  22. 6f1d799 Eliminate switch cases that can never match, for example removes all by Duncan Sands · 12 years ago
  23. 7415659 Add support for r600 (AMD GPUs HD2XXX - HD6XXX) target triplet. by Anton Korobeynikov · 12 years ago
  24. 00cbccc Factor out the analysis of addition and subtraction in ComputeMaskedBits. Reuse by Nick Lewycky · 12 years ago
  25. 5ae0427 [llvm.py] Initial skeleton for Python LLVM bindings by Gregory Szorc · 12 years ago
  26. 1fabd9f misched: handle scheduling region boundaries nicely. by Andrew Trick · 12 years ago
  27. 72051bf Use uint16_t to store opcodes in static tables in X86 backend. by Craig Topper · 12 years ago
  28. e38ec24 Fix undefined behavior in the Mips backend. by Ahmed Charles · 12 years ago
  29. 68675c6 misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private. by Andrew Trick · 12 years ago
  30. d24da97 misched comments by Andrew Trick · 12 years ago
  31. 7799eb4 revert 152356: verify misched changes using -misched=shuffle. by Andrew Trick · 12 years ago
  32. 0058740 Fix a silly restriction on the fast-path for hash_combine_range. This by Chandler Carruth · 12 years ago
  33. e8187e0 Undo a previous restriction on the inline cost calculation which Nick by Chandler Carruth · 12 years ago
  34. abd6674 Fix a regression from r147481. by Chad Rosier · 12 years ago
  35. d04ec0c misched: allow the default scheduler to be one chosen by the target. by Andrew Trick · 12 years ago
  36. f91a330 Added TargetPassConfig::enablePass by Andrew Trick · 12 years ago
  37. 9ad62b3 Cache MBB->begin. It's possible the scheduler / bundler may change MBB->begin(). by Evan Cheng · 12 years ago
  38. cdaedf9 Silence unused function warning when graphviz is not available. by Benjamin Kramer · 12 years ago
  39. 72af527 Remove the no longer existent psp triple from a test. by Benjamin Kramer · 12 years ago
  40. 4445215 Have llvm-mc --version print the list of registered targets like llc does. by Duncan Sands · 12 years ago
  41. ed5edea Revert commit 152300 (ddunbar) since it still seems to be breaking by Duncan Sands · 12 years ago
  42. fac2598 Use uint16_t to store instruction implicit uses and defs. Reduces static data. by Craig Topper · 12 years ago
  43. 9eddc1c [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline, reapplied by Daniel Dunbar · 12 years ago
  44. c10fa6c Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012: by Stepan Dyatkovskiy · 12 years ago
  45. 88d2fa4 Re-commit r152202 hopefully fixing the MSVC linker error. by Craig Topper · 12 years ago
  46. 8c0152f Revert r152288, "[ADT] Change the trivial FoldingSetNodeID::Add* methods to be by Daniel Dunbar · 12 years ago
  47. d4b0a06 Test case for r152280, r152285 and r152290. by Akira Hatanaka · 12 years ago
  48. ee8c3b0 Invoke setTargetDAGCombine for SELECT. by Akira Hatanaka · 12 years ago
  49. 3f778c2 [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline. by Daniel Dunbar · 12 years ago
  50. e2bdf7f Swap the operands of a select node if the false (the second) operand is 0. by Akira Hatanaka · 12 years ago
  51. 6f130bf Rotate two of the functions used to count bonuses for the inline cost by Chandler Carruth · 12 years ago
  52. 5fdf500 Set minimum function alignment to 3 if target is Mips64. by Akira Hatanaka · 12 years ago
  53. 7065b7b This patch eliminates redundant instructions that produce 0. by Akira Hatanaka · 12 years ago
  54. c174eaf misched interface: Expose the MachineScheduler pass. by Andrew Trick · 12 years ago
  55. fd03ccd ARM don't use MCRelaxAll, as it's not safe on ARM. by Jim Grosbach · 12 years ago
  56. 61dfa77 Improved support in RuntimeDyldMachO for generating by Sean Callanan · 12 years ago
  57. 7afcda0 Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface. by Andrew Trick · 12 years ago
  58. ed395c8 misched prep: Expose the ScheduleDAGInstrs interface so targets may by Andrew Trick · 12 years ago
  59. ed8a0ec misched prep: Remove LLVM_LIBRARY_VISIBILITY from ScheduleDAGInstrs. by Andrew Trick · 12 years ago
  60. d790cad misched prep: Comment the ScheduleDAGInstrs interface. by Andrew Trick · 12 years ago
  61. 035ec40 misched prep: Cleanup ScheduleDAGInstrs interface. by Andrew Trick · 12 years ago
  62. 21c5355 misched prep: remove extra "protected" by Andrew Trick · 12 years ago
  63. cf46b5a misched prep: rename InsertPos to End. by Andrew Trick · 12 years ago
  64. 953be89 misched preparation: rename core scheduler methods for consistency. by Andrew Trick · 12 years ago
  65. f03e62a Copy the right amount of elements. by Benjamin Kramer · 12 years ago
  66. 24e0e7c SmallPtrSet: Copy all the elements when swapping, not just numelements. by Benjamin Kramer · 12 years ago
  67. 44c98b7 [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point by Chad Rosier · 12 years ago
  68. 6507d84 Use llvm-mc instead of llc. Patch by Jack Carter. by Rafael Espindola · 12 years ago
  69. 8c3d258 configure: Don't require a perl interpreter to be present, LLVM's buildsystem doesn't depend on perl anymore. by Benjamin Kramer · 12 years ago
  70. 3c77794 Revert r152202 as it's causing internal buildbot failures. by Chad Rosier · 12 years ago
  71. a2da788 Fix infinite loop in nested multiclasses. by Jakob Stoklund Olesen · 12 years ago
  72. cbfc117 Try a completely different approach to this type trait to appease older by Chandler Carruth · 12 years ago
  73. ff12877 Attempt #2 at appeasing GCC 4.3. This compiler really doesn't like these traits. by Chandler Carruth · 12 years ago
  74. b53a1d6 Try to clarify this comment some. by Chandler Carruth · 12 years ago
  75. a1eb50f Switch the is_integral_or_enum trait machinery to use an explicit by Chandler Carruth · 12 years ago
  76. 4e5b0f9 What's better than fixing and simplifying broken hash functions? by Chandler Carruth · 12 years ago
  77. fc22625 Remove another outbreak of customized (and completely broken) hashing. by Chandler Carruth · 12 years ago
  78. d4d8b2a Add support to the hashing infrastructure for automatically hashing both by Chandler Carruth · 12 years ago
  79. 5b2749a Where the BranchFolding pass removes a branch then adds another better branch, by Bill Wendling · 12 years ago
  80. 8c1161a Fix cmake by Andrew Trick · 12 years ago
  81. 6fd7dd6 comment by Andrew Trick · 12 years ago
  82. 47c1445 misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles. by Andrew Trick · 12 years ago
  83. 7b58ae7 ScheduleDAGInstrs comments by Andrew Trick · 12 years ago
  84. 84b454d misched preparation: modularize schedule emission. by Andrew Trick · 12 years ago
  85. 73ba69b misched preparation: modularize schedule printing. by Andrew Trick · 12 years ago
  86. 4c72720 misched preparation: modularize schedule verification. by Andrew Trick · 12 years ago
  87. dbdca36 whitespace by Andrew Trick · 12 years ago
  88. d3c9d94 Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. by Craig Topper · 12 years ago
  89. bb9dbb7 Missing change in r152106 for TinyPtrVector. by Eli Friedman · 12 years ago
  90. eea81f3 Switch this code to use hash_combine_range rather than incremental calls by Chandler Carruth · 12 years ago
  91. f8cde73 Cache the sized-ness of struct types, once we reach the steady state of by Chandler Carruth · 12 years ago
  92. 344224b Remove an accidental cut/paste of a comment into the middle of by Chandler Carruth · 12 years ago
  93. 891495e No functionality change. Type::isSized() can be expensive, so avoid calling it by Nick Lewycky · 12 years ago
  94. 05d88f4 ARM pre-v6 assembly parsing for umull/smull. by Jim Grosbach · 12 years ago
  95. 0104dd3 ARM pre-v6 alias for 'nop' to 'mov r0, r0' by Jim Grosbach · 12 years ago
  96. ff3164a Tidy up. Remove dead code that slipped into previous commit. by Jim Grosbach · 12 years ago
  97. 255cd51 Added -view-background to avoid waiting for each GraphViz invocation. by Andrew Trick · 12 years ago
  98. 0df7f88 Added -view-misched=dags options. by Andrew Trick · 12 years ago
  99. 56b94c5 Cleanup in preparation for misched: Move DAG visualization logic. by Andrew Trick · 12 years ago
  100. 8ceaa66 Added MachineBasicBlock::getFullName() to standardize/factor codegen diagnostics. by Andrew Trick · 12 years ago