- 622dffd How about ULL... by Eric Christopher · 15 years ago
- 99405df Reapply r105521, this time appending "LLU" to 64 bit by Bruno Cardoso Lopes · 15 years ago
- fddb766 Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. by Jakob Stoklund Olesen · 15 years ago
- 70feca4 Teach TableGen to understand X.Y notation in the TSFlagsFields strings. by Jakob Stoklund Olesen · 15 years ago
- e14d2e2 Finally change the instruction looking map to be a densemap from by Chris Lattner · 15 years ago
- 6a91b18 make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 15 years ago
- 01dcecc revert 98912 by Chris Lattner · 15 years ago
- a28bc68 make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 15 years ago
- f650278 change Target.getInstructionsByEnumValue to return a reference by Chris Lattner · 15 years ago
- a7d479c Introduce a new CodeGenInstruction::ConstraintInfo class by Chris Lattner · 16 years ago
- 518bb53 move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 16 years ago
- 243a32f Remove DEBUG_DECLARE, looks like we don't need it. by Dale Johannesen · 16 years ago
- d203520 Add DEBUG_DECLARE. Not used yet. by Dale Johannesen · 16 years ago
- 87563b3 Add DEBUG_VALUE. Not used yet. by Dale Johannesen · 16 years ago
- 533297b Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a by Dan Gohman · 16 years ago
- 799d697 Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When by Evan Cheng · 16 years ago
- 26207e5 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the by Jakob Stoklund Olesen · 16 years ago
- 23132b1 prune the #includes in raw_ostream.h by moving a by Chris Lattner · 16 years ago
- cb778a8 1. Introduce a new TargetOperandInfo::getRegClass() helper method by Chris Lattner · 16 years ago
- a938ac6 make ptr_rc derive from a new PointerLikeRegClass tblgen class. by Chris Lattner · 16 years ago
- 1a55180 Replace std::iostreams with raw_ostream in TableGen. by Daniel Dunbar · 16 years ago
- 88c7af0 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize by Dan Gohman · 16 years ago
- f8c7394 Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS. by Dan Gohman · 16 years ago
- 15511cf Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. by Dan Gohman · 17 years ago
- b89be61 Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers. by Evan Cheng · 17 years ago
- 4406604 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating by Dan Gohman · 17 years ago
- e4c67cd Teach the DAGISelEmitter to not compute the variable_ops operand by Dan Gohman · 17 years ago
- d35121a Fix a tblgen problem handling variable_ops in tblgen instruction by Dan Gohman · 17 years ago
- 8370d38 Add a flag to indicate that an instruction is as cheap (or cheaper) than a move by Bill Wendling · 17 years ago
- ee4fa19 Move instruction flag inference out of InstrInfoEmitter and into by Dan Gohman · 17 years ago
- c929823 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. by Christopher Lamb · 17 years ago
- 20ccded Remove isImplicitDef TargetInstrDesc flag. by Evan Cheng · 17 years ago
- da47e6e Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 17 years ago
- a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
- a22edc8 Simplify the side effect stuff a bit more and make licm/sinking by Chris Lattner · 18 years ago
- ba7e756 Start inferring side effect information more aggressively, and fix many bugs in the by Chris Lattner · 18 years ago
- 214884b if an instr lacks a pattern, assume it has side effects (unless never has s-e is true). by Chris Lattner · 18 years ago
- bc0b9f7 start inferring 'no side effects'. by Chris Lattner · 18 years ago
- 8926038 Infer mayload by Chris Lattner · 18 years ago
- 710e995 realize that instructions who match intrinsics that read memory read memory. by Chris Lattner · 18 years ago
- dcc8b4f add a mayLoad property for machine instructions, a correlary to mayStore. by Chris Lattner · 18 years ago
- 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
- 0ff2396 Rename all the M_* flags to be namespace qualified enums, and switch by Chris Lattner · 18 years ago
- 8f707e1 rename hasVariableOperands() -> isVariadic(). Add some comments. by Chris Lattner · 18 years ago
- 4764189 Move M_* flags down in the file. Move SchedClass up in the by Chris Lattner · 18 years ago
- af3eb7c the name field of instructions is never set to a non-empty string, by Chris Lattner · 18 years ago
- 8ca5c67 Add predicates methods to TargetOperandInfo, and switch all clients by Chris Lattner · 18 years ago
- 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 18 years ago
- 2e48a70 rename isStore -> mayStore to more accurately reflect what it captures. by Chris Lattner · 18 years ago
- c8478d8 Change the 'isStore' inferrer to look for 'SDNPMayStore' by Chris Lattner · 18 years ago
- e67bde5 set the 'isstore' flag for instructions whose pattern is an by Chris Lattner · 18 years ago
- 2d51a4c remove some old hacky code that tried to infer whether a store by Chris Lattner · 18 years ago
- a529a37 rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet. by Chris Lattner · 18 years ago
- 5fbe275 final cleanups. by Chris Lattner · 18 years ago
- ef8339b further simplifications and cleanup by Chris Lattner · 18 years ago
- 951740a simplify some code by Chris Lattner · 18 years ago
- 7b11712 split enum emission out from InstrInfoEmitter into it's own tblgen backend. by Chris Lattner · 18 years ago
- 2c36aff tblgen shouldn't include headers from llvm codegen. by Chris Lattner · 18 years ago
- 3060910 remove attributions from utils. by Chris Lattner · 18 years ago
- 6b1da9c Add flags to indicate that there are "never" side effects or that there "may be" by Bill Wendling · 18 years ago
- 3dd298f Oops. Forgot these. by Evan Cheng · 18 years ago
- 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 18 years ago
- b591082 Added TargetInstrDescriptor::numDefs - num of results. by Evan Cheng · 18 years ago
- 08d5207 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 by Christopher Lamb · 18 years ago
- 88cc092 Try committing again. Add OptionalDefOperand. Remove clobbersPred. by Evan Cheng · 18 years ago
- c419bd3 ImmutablePredicateOperand is no more. by Evan Cheng · 18 years ago
- 8012b07 Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. by Evan Cheng · 18 years ago
- d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 18 years ago
- 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 18 years ago
- eaa91b0 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 18 years ago
- b5c1c9c Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. by Evan Cheng · 18 years ago
- 5127ce0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. by Evan Cheng · 18 years ago
- 3ab6dcf Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. by Evan Cheng · 18 years ago
- 04677a3 Recognize target instruction flag 'isReMaterializable'. by Evan Cheng · 18 years ago
- a683f9b Files missing from LABEL check in. by Jim Laskey · 19 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 19 years ago
- fb1aab0 Add opcode to TargetInstrDescriptor. by Evan Cheng · 19 years ago
- 0bb7500 ADd support for adding constraints to suboperands by Chris Lattner · 19 years ago
- f196839 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't by Chris Lattner · 19 years ago
- a1fd650 Remove M_2_ADDR_FLAG. by Evan Cheng · 19 years ago
- d9a7f4d Mark predicate operands as such in operand info. by Chris Lattner · 19 years ago
- a0cca4a simplify the way operand flags and constraints are handled, making it easier by Chris Lattner · 19 years ago
- a818e92 recognize ppc's blr instruction as predicated by Chris Lattner · 19 years ago
- c51737f Clean up some code. by Evan Cheng · 19 years ago
- e2ba897 Add operand constraints to TargetInstrInfo. by Evan Cheng · 19 years ago
- cd4317e Eliminate data relocations by using NULL instead of global empty list. by Jim Laskey · 19 years ago
- 60f0992 Use an enumeration to eliminate data relocations. by Jim Laskey · 19 years ago
- 8d3af5e Instructions with variable operands (variable_ops) can have a number required by Evan Cheng · 19 years ago
- 21d03f2 lib/Target/Target.td by Evan Cheng · 19 years ago
- 9812f1c Noop instruction by Evan Cheng · 19 years ago
- 108714c Set isStore of instructions with ISD::TRUNCSTORE root node. by Evan Cheng · 19 years ago
- eff5c36 Put instruction names into the first non TargetInstrInfo namespace found. by Chris Lattner · 19 years ago
- afba446 Formating by Evan Cheng · 19 years ago
- 6f6360d Mark instructions whose pattern is (store ...) isStore. by Evan Cheng · 19 years ago
- 719c2fc Don't fill in fields that no longer exist. by Chris Lattner · 19 years ago
- f52e261 If we want to emit things in enum order, use getInstructionsByEnumValue to by Chris Lattner · 20 years ago
- 42d24c7 almost got the HP-UX tester up.. :) by Duraid Madina · 20 years ago
- 65303d6 Teach tblgen about instruction operands that have multiple MachineInstr by Chris Lattner · 20 years ago
- 6cee630 Allow itineraries to be passed through the Target Machine. by Jim Laskey · 20 years ago
- cb366d9 Keep VC++ happy. by Jeff Cohen · 20 years ago