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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 62339073127df4579905f551f61c132cf21d2aad / test
  1. 539aab7 NEON VST4(multiple 4 element structures) assembly parsing. by Jim Grosbach · 13 years ago
  2. 8abe7e3 NEON VLD4(multiple 4 element structures) assembly parsing. by Jim Grosbach · 13 years ago
  3. 3eb4be0 Revert r148686 (and r148694, a fix to it) due to a serious layering by Chandler Carruth · 13 years ago
  4. 4adb182 NEON VST3(single element from one lane) assembly parsing. by Jim Grosbach · 13 years ago
  5. d7433e2 NEON VST3(multiple 3-element structures) assembly parsing. by Jim Grosbach · 13 years ago
  6. c387fc6 NEON VLD3(multiple 3-element structures) assembly parsing. by Jim Grosbach · 13 years ago
  7. f2d2137 Intel syntax: Robustify parsing of memory operand's displacement experssion. by Devang Patel · 13 years ago
  8. 3a678af NEON VLD3 lane-indexed assembly parsing and encoding. by Jim Grosbach · 13 years ago
  9. 16d7d43 Add support for .cfi_signal_frame. Fixes pr11762. by Rafael Espindola · 13 years ago
  10. d0848a6 Fix PR11829. PostRA LICM was too aggressive. by Jakob Stoklund Olesen · 13 years ago
  11. 3e08131 Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] by Devang Patel · 13 years ago
  12. 8b31f95 Simplify some NEON assembly pseudo definitions. by Jim Grosbach · 13 years ago
  13. 7c64fe6 Intel syntax: Parse segment registers. by Devang Patel · 13 years ago
  14. 7908480 An option to selectively enable parts of ARM EHABI support. by Evgeniy Stepanov · 13 years ago
  15. 37abc48 Make Value::isDereferenceablePointer() handle unreachable code blocks. (This by Nick Lewycky · 13 years ago
  16. 4b4e622 Add fused multiple+add instructions from VFPv4. Patch by Ana Pazos! by Anton Korobeynikov · 13 years ago
  17. 1aea430 Intel syntax: Robustify register parsing. by Devang Patel · 13 years ago
  18. 0041d4d Handle a corner case with IV chain collection with bailout instead of assert. by Andrew Trick · 13 years ago
  19. a44919e Test case comments missing from my previous checkin. by Andrew Trick · 13 years ago
  20. fdd3b30 Intel syntax: Parse ... PTR [-8] by Devang Patel · 13 years ago
  21. cf0e269 Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. by Devang Patel · 13 years ago
  22. 1e9ccd6 ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651> by Bob Wilson · 13 years ago
  23. 6d56730 VST2 four-register w/ update pseudos for fixed/register update. by Jim Grosbach · 13 years ago
  24. 51222d1 NEON use vmov.i32 to splat some f32 values into vectors. by Jim Grosbach · 13 years ago
  25. 38b6d9d Fix CountCodeReductionForAlloca to more accurately represent what SROA can and by Nick Lewycky · 13 years ago
  26. b5c26ef SCEVExpander fixes. Affects LSR and indvars. by Andrew Trick · 13 years ago
  27. 0e2037b Add support for selecting 256-bit PALIGNR. by Craig Topper · 13 years ago
  28. a486783 Remove a low-quality test which was failing on Windows; test/CodeGen/X86/sret.ll is a better test for the relevant behavior. by Eli Friedman · 13 years ago
  29. 9a2478a Support MSVC x86-32 sret convention. PR11688. Patch by Joe Groff. by Eli Friedman · 13 years ago
  30. 0cdece4 Set the "tail" flag on pattern-matched objc_storeStrong calls. rdar://10531041. by Dan Gohman · 13 years ago
  31. a951f77 Post process 'and', 'sub' instructions and select better encoding, if available. by Devang Patel · 13 years ago
  32. e60540f Intel syntax: There is no need to create unary expr for simple negative displacement. by Devang Patel · 13 years ago
  33. ac0f048 Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available. by Devang Patel · 13 years ago
  34. 73dd8bb Emit ARM EHABI unwinding instructions for 3 more Thumb instructions. by Evgeniy Stepanov · 13 years ago
  35. 904b7be Add testcase. by Jim Grosbach · 13 years ago
  36. 2faa5d2 Space after punctuation. by Nick Lewycky · 13 years ago
  37. 22de16d Add a TargetOption for disabling tail calls. by Nick Lewycky · 13 years ago
  38. 0b4c673 Thumb2 alternate syntax for LDR(literal) and friends. by Jim Grosbach · 13 years ago
  39. b8ba13f Process instructions after match to select alternative encoding which may be more desirable. by Devang Patel · 13 years ago
  40. 256ba4f Thumb2 relaxation for LDR(literal). by Jim Grosbach · 13 years ago
  41. 1dae3e9 Use llvm.global_ctors to locate global constructors instead by Dan Gohman · 13 years ago
  42. 819026f Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted. by Nadav Rotem · 13 years ago
  43. 97af768 Test case rename by Andrew Trick · 13 years ago
  44. 8b9300b MC tweak symbol difference resolution for non-local symbols. by Jim Grosbach · 13 years ago
  45. 283f1ff Tidy up. by Jim Grosbach · 13 years ago
  46. 2f8af1d Intel syntax: Fix parser match class to check memory operand size. by Devang Patel · 13 years ago
  47. ba05c91 Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT. by Nadav Rotem · 13 years ago
  48. 6220fea Intel syntax: Parse "BYTE PTR [RDX + RCX]" by Devang Patel · 13 years ago
  49. 2f6263c Add a new ObjC ARC optimization pass to eliminate unneeded by Dan Gohman · 13 years ago
  50. 9a3d293 Intel syntax: Do not unncessarily create plus expression for memory operand displacement. by Devang Patel · 13 years ago
  51. 40bced0 Intel syntax: Ignore mnemonic aliases. by Devang Patel · 13 years ago
  52. aa2bb63 Remove "XFAIL: arm" from test/ExecutionEngine/test-return.ll by Eli Bendersky · 13 years ago
  53. d37ad24 Intel syntax: Robustify memory operand parsing. by Devang Patel · 13 years ago
  54. a7f99f2 Additional ExecutionEngine tests, as part of bringing up the MCJIT on ELF by Eli Bendersky · 13 years ago
  55. 0b94b5f Fix 11769. by Nadav Rotem · 13 years ago
  56. 0f08091 LSR fix: broaden the check for loop preheaders. by Andrew Trick · 13 years ago
  57. 504d1d2 AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit by Hal Finkel · 13 years ago
  58. 1857b51 Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768. by Eli Friedman · 13 years ago
  59. a66a185 Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is currently basic and will be enhanced with future patches. by Eli Bendersky · 13 years ago
  60. cc61656 [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits. by Nadav Rotem · 13 years ago
  61. 980bce2 Relax the FileCheck assertion a bit -- all we really care about is that by Chandler Carruth · 13 years ago
  62. 482e4a8 FileCheck-ize a test, make it more specific to directly test the shift by Chandler Carruth · 13 years ago
  63. dd1f22f Fix a corner case hit by redundant phi elimination running after LSR. by Andrew Trick · 13 years ago
  64. bfe8afa After r147827 and r147902, it's now possible for unallocatable registers to be by Evan Cheng · 13 years ago
  65. 4f00c08 Cleanup test case by adding checks for test names. by Chad Rosier · 13 years ago
  66. 20fb487 Add a test showing how the Leh_func_endN symbol is used. by Rafael Espindola · 13 years ago
  67. 4a5c0fd Add new test. by Devang Patel · 13 years ago
  68. db080e8 test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts. by NAKAMURA Takumi · 13 years ago
  69. c30432a Add patterns for v16i16 and v32i8 immAllZerosV to select VPXOR to match v4i64 and v8i32. by Craig Topper · 13 years ago
  70. c4b527a DAGCombine's logic for forming pre- and post- indexed loads / stores were being by Evan Cheng · 13 years ago
  71. 79522dc Implement proper ObjC ARC objc_retainBlock "escape" analysis, so that by Dan Gohman · 13 years ago
  72. 16db710 Fixed a bug in LowerVECTOR_SHUFFLE caused assertion failure by Elena Demikhovsky · 13 years ago
  73. 0577c59 Add error-reporting tests for platforms that don't support segmented stacks. by Rafael Espindola · 13 years ago
  74. 85b9d43 Support segmented stacks on 64-bit FreeBSD. by Rafael Espindola · 13 years ago
  75. e4d18de Support segmented stacks on win32. by Rafael Espindola · 13 years ago
  76. 989a681 Remove test case, as Chris suggested. by Devang Patel · 13 years ago
  77. 21d3c40 Add test case to check intel syntax parsing. by Devang Patel · 13 years ago
  78. d2070b0 Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is on the boundary of two 128-bit vectors. by Nadav Rotem · 13 years ago
  79. fb418ba X86: Generalize the x << (y & const) optimization to also catch masks with more set bits set than 31 or 63. by Benjamin Kramer · 13 years ago
  80. c8d12ee On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used. by Nadav Rotem · 13 years ago
  81. 3bf052b Check to make sure that the CFString's back store ends up in the correct section. by Bill Wendling · 13 years ago
  82. 2028b79 Support segmented stacks on mac. by Rafael Espindola · 13 years ago
  83. 7692ce9 Split segmented stacks tests into tests for static- and dynamic-size frames. by Rafael Espindola · 13 years ago
  84. 25cd4ff Generate the segmented stack prologue for fastcc too. Patch by Brian Anderson. by Rafael Espindola · 13 years ago
  85. 11f0e7b Revert r147945 which disabled an addressing mode transformation. I had by Chandler Carruth · 13 years ago
  86. 313c703 Use unsigned comparison in segmented stack prologue. by Rafael Espindola · 13 years ago
  87. 014f7a3 Explicitly set the scale to 1 on some segstack prologue instrs. by Rafael Espindola · 13 years ago
  88. 8704b78 The error check for using -g with a .s file already containing dwarf .file by Kevin Enderby · 13 years ago
  89. 46df3ad Add XOP Intrinsics and tests by Jan Sjödin · 13 years ago
  90. 394a1f5 Fix a bug in the lowering of BUILD_VECTOR for AVX. SCALAR_TO_VECTOR does not zero untouched elements. Use INSERT_VECTOR_ELT instead. by Nadav Rotem · 13 years ago
  91. 1876abe Don't try to create a GEP when the pointee type is unsized (such GEPs by Duncan Sands · 13 years ago
  92. e4bc80a Disable the transformation I added in r147936 to see if it fixes some by Chandler Carruth · 13 years ago
  93. dec1f99 Fix undefined code and reenable test case. by Jakob Stoklund Olesen · 13 years ago
  94. f103b3d Teach the X86 instruction selection to do some heroic transforms to by Chandler Carruth · 13 years ago
  95. 88c5c42 Improved compile time: by Stepan Dyatkovskiy · 13 years ago
  96. 69b5df8 llvm/test/CodeGen/X86/zext-fold.ll: Relax an expression in stack offset. by NAKAMURA Takumi · 13 years ago
  97. 29cc410 llvm/test/CodeGen/X86/sub-with-overflow.ll: Add explicit -mtriple=i686-linux. by NAKAMURA Takumi · 13 years ago
  98. 29a1714 Add big endian mips support. Based on a patch by Jack Carter. by Rafael Espindola · 13 years ago
  99. fddf804 Add the skeleton of an asm parser for mips. by Rafael Espindola · 13 years ago
  100. 08c6664 ARM Ld/St Optimizer fix. by Andrew Trick · 13 years ago