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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 6288b93f00e8747eaff69f2954a76efc587e7b55 / lib / Target
  1. 6288b93 Fix X86MachineFunctionInfo's doxygen comment. by Dan Gohman · 16 years ago
  2. aaa1fdb Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with by Dan Gohman · 16 years ago
  3. 6d9305c Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when by Dan Gohman · 16 years ago
  4. a2f3703 GR8_NOREX can contain the H registers, since they don't require REX prefixes. by Dan Gohman · 16 years ago
  5. 62ad138 For the h-register addressing-mode trick, use the correct value for by Dan Gohman · 16 years ago
  6. b3f5bfe Some of GR8_NOREX registers are only available in 64-bit mode. by Evan Cheng · 16 years ago
  7. 85be408 Handle aggregate type arguments to direct and indirect calls. by Sanjiv Gupta · 16 years ago
  8. 88c7af0 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize by Dan Gohman · 16 years ago
  9. 0f7fef3 by Devang Patel · 16 years ago
  10. 21e3dfb Implement x86 h-register extract support. by Dan Gohman · 16 years ago
  11. 8433df3 Remove x86's special-case handling for ISD::TRUNCATE and by Dan Gohman · 16 years ago
  12. 3cf9b3e Fix copy+pastos in comments. by Dan Gohman · 16 years ago
  13. ee30047 List the l registers before h registers, for consistency. by Dan Gohman · 16 years ago
  14. 3cd0aa3 Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant. by Dan Gohman · 16 years ago
  15. 04d19f0 Add a comment about MOVSX64rr8. by Dan Gohman · 16 years ago
  16. 8cc632f Fix another hard-coded constant to use X86AddrNumOperands. by Dan Gohman · 16 years ago
  17. 7ff5bff X86-64 TLS support for local exec and initial exec. by Rafael Espindola · 16 years ago
  18. 12f23a8 While passing arg of types larger than char only one byte at lower end was getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256. by Sanjiv Gupta · 16 years ago
  19. 266c7bb Add a new "available_externally" linkage type. This is intended by Chris Lattner · 16 years ago
  20. b215776 In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching by Rafael Espindola · 16 years ago
  21. 49a168d refactor some code into X86DAGToDAGISel::MatchWrapper by Rafael Espindola · 16 years ago
  22. 8d57b77 fix a cross-block fastisel crash handling overflow intrinsics. by Chris Lattner · 16 years ago
  23. a9a4225 simplify code by using IntrinsicInst. by Chris Lattner · 16 years ago
  24. 0461c0a Add new TargetInstrDesc::hasImplicitUseOfPhysReg and by Chris Lattner · 16 years ago
  25. c6fa3ff Revert r68847. It breaks the build on non-Darwin targets, with this message by Dan Gohman · 16 years ago
  26. 2057532 Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) by Devang Patel · 16 years ago
  27. a3613be Added code to handle spilling and reloading of FSRs. by Sanjiv Gupta · 16 years ago
  28. dbcfb30 Don't fold a load if the other operand is a TLS address. by Rafael Espindola · 16 years ago
  29. c2406f2 a few fixes to "addrspace(256) is reference offset of GS segment register". by Chris Lattner · 16 years ago
  30. 7d16e85 Pass in the std::string parameter instead of returning it by value. by Bill Wendling · 16 years ago
  31. fc16657 Remove the obsolete SelectionDAG::getNodeValueTypes and simplify by Dan Gohman · 16 years ago
  32. 3ca15c9 Give register alias checking the hash table treatment too. by Owen Anderson · 16 years ago
  33. d9df501 Fix pr3954. The register scavenger asserts for inline assembly with by Bob Wilson · 16 years ago
  34. 37831d0 The way we are trying to figure out banksel immediate operand may yield different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand. by Sanjiv Gupta · 16 years ago
  35. e206b1d Arguments to indirect calls were being passed incorrectly. They are not fixed to start after return value. by Sanjiv Gupta · 16 years ago
  36. a1cd83a Fix code size computation on x86-64, patch by Zoltan Varga! by Chris Lattner · 16 years ago
  37. 6e2a46a r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC. by Sanjiv Gupta · 16 years ago
  38. 7d770be Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does. by Owen Anderson · 16 years ago
  39. 349ba49 Fix grammaros in comments. by Dan Gohman · 16 years ago
  40. 094fad3 Re-apply 68552. Tested by bootstrapping llvm-gcc and using that to build llvm. by Rafael Espindola · 16 years ago
  41. 2c7dab1 Fix PR3795: Apply Dan's suggested fix for by Bob Wilson · 16 years ago
  42. 8ef2b89 Avoid a hard coded constant. by Rafael Espindola · 16 years ago
  43. c1fa70c Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes. by Sanjiv Gupta · 16 years ago
  44. 7836fc1 Handle indirect function calls. by Sanjiv Gupta · 16 years ago
  45. 97121ba Implement support for using modeling implicit-zero-extension on x86-64 by Dan Gohman · 16 years ago
  46. 044b534 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM by Bill Wendling · 16 years ago
  47. 2a6411b Reduce code duplication on the TLS implementation. by Rafael Espindola · 16 years ago
  48. 30eae3c PR2985 / <rdar://problem/6584986> by Jim Grosbach · 16 years ago
  49. 8f34346 Handle 'a' modifier in ARM inline assembly. Patch by Richard Pennington. by Bob Wilson · 16 years ago
  50. cae1b62 Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc. by Sanjiv Gupta · 16 years ago
  51. eec4b2d Wrap some lines to fix indentation problems. by Bob Wilson · 16 years ago
  52. 1b46a68 Fix some comments. by Bob Wilson · 16 years ago
  53. fcf054b CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt by Oscar Fuentes · 16 years ago
  54. 6c5cfec Separate MIPS asmprinter by Anton Korobeynikov · 16 years ago
  55. 60a19a4 Fix target library name by Anton Korobeynikov · 16 years ago
  56. c67d112 Fix comment by Anton Korobeynikov · 16 years ago
  57. ea38970 Move IA64 asmprinter to separate library by Anton Korobeynikov · 16 years ago
  58. 1e95580 Added a x86 dag combine to increase the chances to use a by Mon P Wang · 16 years ago
  59. c2eb87a Fixed build warnings. by Sanjiv Gupta · 16 years ago
  60. 5274a4a To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize. by Sanjiv Gupta · 16 years ago
  61. b84d5a4 Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots. by Sanjiv Gupta · 16 years ago
  62. 5867de1 silence warning in release-asserts build. by Chris Lattner · 16 years ago
  63. de551f9 Use CHAR_BIT instead of hard-coding 8 in several places where it by Dan Gohman · 16 years ago
  64. 77c5b0d Use LLVM type names instead of C type names in comments, to be by Dan Gohman · 16 years ago
  65. bf6396b Fix PR3862: Recognize some ARM-specific constraints for immediates in inline by Bob Wilson · 16 years ago
  66. d54f2d5 i128 shift libcalls are not available on x86. by Evan Cheng · 16 years ago
  67. 968dc7a Reapply 68073, with fixes. EH Landing-pad basic blocks are not by Dan Gohman · 16 years ago
  68. 523249f remove unused arguments. by Rafael Espindola · 16 years ago
  69. df4881c Really temporarily revert r68073. by Bill Wendling · 16 years ago
  70. e67f5e4 Oy! When reverting r68073, I added in experimental code. Sorry... by Bill Wendling · 16 years ago
  71. 8fe0054 Revert r68073. It's causing a failure in the Apple-style builds. by Bill Wendling · 16 years ago
  72. 4d95232 X86 address mode isel tweak. If the base of the address is also used by a CopyToReg (i.e. it's likely live-out), do not fold the sub-expressions into the addressing mode to avoid computing the address twice. The CopyToReg use will be isel'ed to a LEA, re-use it for address instead. by Evan Cheng · 16 years ago
  73. 80c93e7 Except in asm-verbose mode, avoid printing labels for blocks that are by Dan Gohman · 16 years ago
  74. 73f24c9 When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. by Evan Cheng · 16 years ago
  75. d83712a Fix comment to match function name. by Bob Wilson · 16 years ago
  76. 29519b1 Fix thinko: put stuff with both global and local relocations into data.rel{.ro}, not .local by Anton Korobeynikov · 16 years ago
  77. fca82de Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness. by Anton Korobeynikov · 16 years ago
  78. 71a7c6c Add data.rel stuff by Anton Korobeynikov · 16 years ago
  79. 721c2c6 IA64 is as weird as Alpha wrt r/o relocs :) by Anton Korobeynikov · 16 years ago
  80. 01209bc Alpha always requires global relocations to be r/w regardless of PIC. by Anton Korobeynikov · 16 years ago
  81. db23231 Honour relocation behaviour stuff for ro objects by Anton Korobeynikov · 16 years ago
  82. 352f3e5 add a note by Chris Lattner · 16 years ago
  83. a0a4f07 Use array_lengthof by Rafael Espindola · 16 years ago
  84. da945e3 Have only one definition of X86AddrNumOperands. by Rafael Espindola · 16 years ago
  85. b449a68 Make code a bit less brittle by no hardcoding the number by Rafael Espindola · 16 years ago
  86. 0b0cd91 Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g. by Evan Cheng · 16 years ago
  87. 0ede14f remove trailing whitespace by Jim Grosbach · 16 years ago
  88. 705d800 Avoid hardcoding that X86 addresses have 4 operands. by Rafael Espindola · 16 years ago
  89. e4d5d34 Use less hard coded constants to make the code less brittle. by Rafael Espindola · 16 years ago
  90. a82dfca I am trying to add a segment to the X86 addresses matching to by Rafael Espindola · 16 years ago
  91. 9272253 -no-implicit-float means explicit fp operations are legal. by Evan Cheng · 16 years ago
  92. 9d7b530 tADDhirr is a thumb instruction. Do not allow this code to be reached in non-thumb mode. by Evan Cheng · 16 years ago
  93. a02a3dd Pull transform from target-dependent code into target-independent code. by Bill Wendling · 16 years ago
  94. e7fa1f2 fix warning in -asserts mode. by Chris Lattner · 16 years ago
  95. e3a8583 fix some warnings in release-asserts mode. by Chris Lattner · 16 years ago
  96. d401507 fix an apparently real bug exposed by a warning in -asserts mode. by Chris Lattner · 16 years ago
  97. 022a27e fix warning in -asserts build. by Chris Lattner · 16 years ago
  98. 8b4b874 Match this pattern so that we can generate simpler code: by Bill Wendling · 16 years ago
  99. bddc442 Doxygen-ify comments. by Bill Wendling · 16 years ago
  100. 0c8f7dc do not rely on callee being operand 0 by Gabor Greif · 16 years ago