1. 757072d Remove -reduce-joining-phys-regs options. Make it on by default. by Evan Cheng · 18 years ago
  2. 9f6636f Fix naming inconsistencies. by Evan Cheng · 18 years ago
  3. fa775d0 Special LDR instructions to load from non-pc-relative constantpools. These are by Evan Cheng · 18 years ago
  4. a251570 Constant generation instructions are re-materializable. by Evan Cheng · 18 years ago
  5. e2e9e44 Added isReMaterializable. by Evan Cheng · 18 years ago
  6. 79b0984 Minor bug fix. by Evan Cheng · 18 years ago
  7. d435dbc fix a warning by Chris Lattner · 18 years ago
  8. 8bf9911 implement the next chunk of SROA with memset/memcpy's of aggregates. This by Chris Lattner · 18 years ago
  9. 3f64b1a Clean up this code and fix subtract miscompile. by Nick Lewycky · 18 years ago
  10. 318bf79 Implement InstCombine/and-xor-merge.ll:test[12]. by Chris Lattner · 18 years ago
  11. 11a3a9d minor updates by Chris Lattner · 18 years ago
  12. 7f4ba44 This is implemented. We now generate: by Nick Lewycky · 18 years ago
  13. cf596c5 - Merge UsedBlocks info after two virtual registers are coalesced. by Evan Cheng · 18 years ago
  14. e951cd1 Keep UsedBlocks info accurate. by Evan Cheng · 18 years ago
  15. 1eda0f6 Propagate ValueRanges across equality. by Nick Lewycky · 18 years ago
  16. 1cc6452 Silence warning by Anton Korobeynikov · 18 years ago
  17. c6a2410 Track the BB's where each virtual register is used. by Evan Cheng · 18 years ago
  18. ba1a3df Joining a live interval of a physical register with a virtual one can turn out by Evan Cheng · 18 years ago
  19. db264ae Use SmallSet instead of std::set. by Evan Cheng · 18 years ago
  20. 2edd563 If sdisel has decided to sink GEP index expression into any BB. Replace all uses by Evan Cheng · 18 years ago
  21. 84f7fd2 Support 'I' inline asm constraint. by Devang Patel · 18 years ago
  22. 368f20f Only ARMv6 has BSWAP. Fix MultiSource/Applications/aha test. by Lauro Ramos Venancio · 18 years ago
  23. 9e2d86a Turn on GEP index sinking by default. by Evan Cheng · 18 years ago
  24. 9f5ead9 Stupid bug. by Evan Cheng · 18 years ago
  25. 1b7a81d And now support for MMX logical operations. by Bill Wendling · 18 years ago
  26. 3cd4e50 Sink a binary expression into its use blocks if it is a loop invariant by Evan Cheng · 18 years ago
  27. 2770747 Added isLegalAddressExpression(). Only allows X +/- C for now. by Evan Cheng · 18 years ago
  28. 14245a9 Added isLegalAddressExpression hook to test if the given expression can be by Evan Cheng · 18 years ago
  29. 4c70875 Add more comments and update to new asm syntax. by Nick Lewycky · 18 years ago
  30. 74027e9 Multiplication support for MMX. by Bill Wendling · 18 years ago
  31. 56fdd7a Debugging output stuff. by Evan Cheng · 18 years ago
  32. c6deb3d Estimate a cost using the possible number of scratch registers required and use by Evan Cheng · 18 years ago
  33. ba69300 Under X86-64 large code model, do not emit 32-bit pc relative calls. by Evan Cheng · 18 years ago
  34. 4485d38 Notes about codegen issues. by Evan Cheng · 18 years ago
  35. e70ef98 Clean up. by Evan Cheng · 18 years ago
  36. 774be29 Oops. by Evan Cheng · 18 years ago
  37. a19ac52 X86-64 JIT is in large code model. Need stubs for direct calls. by Evan Cheng · 18 years ago
  38. 8510dc0 x86-64 JIT stub codegen. by Evan Cheng · 18 years ago
  39. 5c0b61a Preliminary support for X86-64 JIT stub codegen. by Evan Cheng · 18 years ago
  40. adc1495 ShiftAmt might equal to zero. Handle this situation. by Zhou Sheng · 18 years ago
  41. 9670445 Enable KnownZero/One.clear(). by Zhou Sheng · 18 years ago
  42. 61230d1 Try schedule def + use closer whne Sethi-Ullman numbers are the same. by Evan Cheng · 18 years ago
  43. a13fd10 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] by Evan Cheng · 18 years ago
  44. 961f879 Zero is always a legal AM immediate. by Evan Cheng · 18 years ago
  45. 1d95816 Correct type info for isLegalAddressImmediate() check. by Evan Cheng · 18 years ago
  46. b2ec1cc Stack and register alignment of call arguments in the ELF ABI by Nicolas Geoffray · 18 years ago
  47. bc1dbfc ifdef out some dead code. by Chris Lattner · 18 years ago
  48. b277b16 For expression like by Zhou Sheng · 18 years ago
  49. 771dbf7 In APInt version ComputeMaskedBits(): by Zhou Sheng · 18 years ago
  50. e8308df Implement getTargetLowering() or else LSR won't be using ARM specific hooks. by Evan Cheng · 18 years ago
  51. c289faf More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
  52. b01fad6 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. by Evan Cheng · 18 years ago
  53. 8619391 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
  54. a8a155e More flexible TargetLowering LSR hooks for testing whether an immediate is by Evan Cheng · 18 years ago
  55. 5eef2d2 Use new TargetLowering addressing modes hooks. by Evan Cheng · 18 years ago
  56. 37e8856 Stupid bug: SSE2 supports v2i64 add / sub. by Evan Cheng · 18 years ago
  57. 4fd8606 Revert the last patch as it violates the conditions of sext/zext. by Reid Spencer · 18 years ago
  58. 2b7d7b5 Unbreak C++ build. by Jeff Cohen · 18 years ago
  59. c4558fd Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and by Jeff Cohen · 18 years ago
  60. 7d820f5 For APInt::z/sext(width), if width == BitWidth, just return *this. by Zhou Sheng · 18 years ago
  61. 8cb6834 Add an APInt version of SimplifyDemandedBits. by Reid Spencer · 18 years ago
  62. 6b79e2d Add an APInt version of ShrinkDemandedConstant. by Reid Spencer · 18 years ago
  63. edd089c Avoid to assert on "(KnownZero & KnownOne) == 0". by Zhou Sheng · 18 years ago
  64. 430f626 In function ComputeMaskedBits(): by Zhou Sheng · 18 years ago
  65. e677a0b Add value ranges. Currently inefficient in both execution time and by Nick Lewycky · 18 years ago
  66. e2ff29c Use range tests in LowerSwitch, where possible by Anton Korobeynikov · 18 years ago
  67. 3400e6a Add getter methods for the extremes of a ConstantRange. by Nick Lewycky · 18 years ago
  68. c1fb047 Adding more arithmetic operators to MMX. This is an almost exact copy of by Bill Wendling · 18 years ago
  69. f7543fe Remove dead comments. by Devang Patel · 18 years ago
  70. a5b7dc5 Avoid recursion. Use iterative algorithm for RenamePass(). by Devang Patel · 18 years ago
  71. 4fe2658 Increment iterator now because IVUseShouldUsePostIncValue may remove by Devang Patel · 18 years ago
  72. afc3782 Regenerate. by Reid Spencer · 18 years ago
  73. 1a9da0d Minor stuff. by Evan Cheng · 18 years ago
  74. 44f4fca Add comments about LSR / ARM. by Evan Cheng · 18 years ago
  75. 2265b49 Unfinished work and ideas related to register scavenger. by Evan Cheng · 18 years ago
  76. 87707b9 For PR1245: by Reid Spencer · 18 years ago
  77. 818c085 apply comments from review of last patch by Dale Johannesen · 18 years ago
  78. a6bc6fc Add some observations from CoreGraphics benchmark. Remove register by Dale Johannesen · 18 years ago
  79. 349ec1c Unbreak mingw32 build by Anton Korobeynikov · 18 years ago
  80. e2ee996 If a virtual register is already marked alive in this block, that means it is by Evan Cheng · 18 years ago
  81. 2197051 Print preds / succs BB numbers. by Evan Cheng · 18 years ago
  82. f0e3bb1 Avoid variable shadowing. by Evan Cheng · 18 years ago
  83. 47992ea Don't use std::hex. by Bill Wendling · 18 years ago
  84. 3bae2e9 Don't use a cast. It causes an error on some platforms. by Bill Wendling · 18 years ago
  85. 23a9570 Implement inline asm modifier c. by Evan Cheng · 18 years ago
  86. 6dfc680 implement support for floating point constants used as inline asm memory operands. by Chris Lattner · 18 years ago
  87. 2f88dcd Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that by Bill Wendling · 18 years ago
  88. b582b1b Fix a typo. by Evan Cheng · 18 years ago
  89. d46825c Speed Up Pass Manager. by Devang Patel · 18 years ago
  90. a47f60b Fix a bug in function ComputeMaskedBits(). by Zhou Sheng · 18 years ago
  91. 032953d Putting more constants which do not contain relocations into .literal{4|8|16} by Evan Cheng · 18 years ago
  92. b4ddac9 make this fail even in non-assert builds. by Chris Lattner · 18 years ago
  93. 97f9df1 This appears correct, enable it so we can see perf changes on testers by Chris Lattner · 18 years ago
  94. c14d3ca Second half of PR1226. This is currently still disabled, until I have a chance to by Chris Lattner · 18 years ago
  95. 9a28daa Fix a bug in APIntified ComputeMaskedBits(). by Zhou Sheng · 18 years ago
  96. bf822eb Change register allocation order to Dale's suggestion. by Evan Cheng · 18 years ago
  97. 11788fd Bug fix. Not advancing the register scavenger iterator correctly. by Evan Cheng · 18 years ago
  98. e7816b5 For PR1205: by Reid Spencer · 18 years ago
  99. 3e7594f For PR1205: by Reid Spencer · 18 years ago
  100. 98ded76 For Darwin, put constant data into .const, .const_data, .literal{4|8|16} by Evan Cheng · 18 years ago