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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 687bc49d1ada3fe0a2cd3fb5c044f12d267f259f / lib / Target / ARM / ARMISelDAGToDAG.cpp
  1. 687bc49 initial support for branches by Rafael Espindola · 19 years ago
  2. 3c000bf initial support for select by Rafael Espindola · 19 years ago
  3. 3717ca9 call computeRegisterProperties by Rafael Espindola · 19 years ago
  4. f3a335c add a "load effective address" by Rafael Espindola · 19 years ago
  5. ec46ea3 Declare the callee saved regs by Rafael Espindola · 19 years ago
  6. 61369da select code like ldr rx, [ry, #offset] by Rafael Espindola · 19 years ago
  7. e219945 Eliminate use of getNode that takes a vector. by Chris Lattner · 19 years ago
  8. 8742867 elimiante use of getNode that takes vector of operands. by Chris Lattner · 19 years ago
  9. 64a752f Match tablegen changes. by Evan Cheng · 19 years ago
  10. 7a53bd0 fix the spill code by Rafael Espindola · 19 years ago
  11. 1a00946 initial support for variable number of arguments by Rafael Espindola · 19 years ago
  12. 2ef88a0 Match tablegen isel changes. by Evan Cheng · 19 years ago
  13. 341b864 use a 'register pressure reducing' scheduler by Rafael Espindola · 19 years ago
  14. 6312da0 Bug fix: always generate a RET_FLAG in LowerRET fixes ret_null.ll and call.ll by Rafael Espindola · 19 years ago
  15. f4fda80 add and use ARMISD::RET_FLAG by Rafael Espindola · 19 years ago
  16. 06c1e7e implement LowerConstantPool and LowerGlobalAddress by Rafael Espindola · 19 years ago
  17. 2641cad Remove InFlightSet hack. No longer needed. by Evan Cheng · 19 years ago
  18. fac00a9 implement function calling of functions with up to 4 arguments by Rafael Espindola · 19 years ago
  19. 84b19be skeleton of a lowerCall implementation for ARM by Rafael Espindola · 19 years ago
  20. a4e6435 add the memri memory operand by Rafael Espindola · 19 years ago
  21. aefe142 create the raddr addressing mode that matches any register and the frame index by Rafael Espindola · 19 years ago
  22. 49e4415 handle the "mov reg1, reg2" case in isMoveInstr by Rafael Espindola · 19 years ago
  23. 337c4ad6 lower more then 4 formal arguments. The offset is currently hard coded. by Rafael Espindola · 19 years ago
  24. 4b02367 add R0 to liveout by Rafael Espindola · 19 years ago
  25. 85ede37 Expand ret into "CopyToReg;BRIND" by Rafael Espindola · 19 years ago
  26. 6848be1 Change RET node to include signness information of the return values. i.e. by Evan Cheng · 19 years ago
  27. c3c1a86 port the ARM backend to use ISD::CALL instead of LowerCallTo by Rafael Espindola · 19 years ago
  28. 6a3d5a6 Assert if InflightSet is not cleared after instruction selecting a BB. by Evan Cheng · 19 years ago
  29. afe358e Clear HandleMap and ReplaceMap after instruction selection. Or it may cause by Evan Cheng · 19 years ago
  30. d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 19 years ago
  31. 4b442b5 implement minimal versions of by Rafael Espindola · 19 years ago
  32. dc124a2 implement movri add a stub LowerFORMAL_ARGUMENTS by Rafael Espindola · 19 years ago
  33. 1c8f053 add an abort after every assert(0) by Rafael Espindola · 19 years ago
  34. 7bc59bc added a skeleton of the ARM backend by Rafael Espindola · 19 years ago