Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 68ad5673e80d51add854a7336752e56e3e22afa0
  1. 68ad567 Fix function isUnalignedLoadStore. by Akira Hatanaka · 13 years ago
  2. 2bd0118 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. by Jim Grosbach · 13 years ago
  3. d8212b2 Remove unused PatLeaf. by Akira Hatanaka · 13 years ago
  4. 7cc037a Change the names of 64-bit logical instructions so that they match the names of by Akira Hatanaka · 13 years ago
  5. e575499 Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... by Bill Wendling · 13 years ago
  6. 395d76c Remove redundancy in setcc patterns using multiclass. by Akira Hatanaka · 13 years ago
  7. c055a87 Fix PR11106 by correcting a typo that has been in the code for over a year. This by Cameron Zwarich · 13 years ago
  8. b07a3d6 Use sltiu instead of sltu when a register operand and immediate are compared. by Akira Hatanaka · 13 years ago
  9. fbab220 Update test for r141704. by Jim Grosbach · 13 years ago
  10. 2cf8dd3 ARM addressing mode cleanup for LDC/STC. by Jim Grosbach · 13 years ago
  11. 2c607b6 Clean up a few references to System/. We still have docs/SystemLibrary.html by Daniel Dunbar · 13 years ago
  12. b5e8bc1 Support/DataTypes.h: Clean up some types and add matching (but presumably by Daniel Dunbar · 13 years ago
  13. 830378f Remove extra semicolon. by Eli Friedman · 13 years ago
  14. 06f8231 Add patterns for conditional branches with 64-bit register operands. by Akira Hatanaka · 13 years ago
  15. 8191f34 Add support for 64-bit set-on-less-than instructions. by Akira Hatanaka · 13 years ago
  16. 3e3427a Add support for conditional branch instructions with 64-bit register operands. by Akira Hatanaka · 13 years ago
  17. 2e35047 Add dominance check for the instruction being hoisted. by Devang Patel · 13 years ago
  18. 5f119a6 Fixed docs to reflect the proper default value and behaviour of the natural stack alignment. by Lang Hames · 13 years ago
  19. f7c93a3 Expose MachOObjectFile externally, like we do for COFF. First step in reducing the amount of special-purpose code needed for llvm-objdump. by Owen Anderson · 13 years ago
  20. 57dcb85 ARM parse alignment specifier for NEON load/store instructions. by Jim Grosbach · 13 years ago
  21. 32ee5c2 Mention the cmake build guide on the main docs page. by Duncan Sands · 13 years ago
  22. e53c87b ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity. by Jim Grosbach · 13 years ago
  23. 6fe4e51 Add support for legalization of vector SHL/SRA/SRL instructions by Nadav Rotem · 13 years ago
  24. 6c6f28f Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. by Richard Osborne · 13 years ago
  25. 56354d4 Fix a iterator out of bounds error, that triggers rarely. by Kalle Raiskila · 13 years ago
  26. f048c3f llvm-objdump.cpp: Use PRIx64 as format specifier for int64_t. by NAKAMURA Takumi · 13 years ago
  27. e2aa5d5 Add -D__STDC_FORMAT_MACROS to use PRIx64. by NAKAMURA Takumi · 13 years ago
  28. 11b8a00 cmake/modules/HandleLLVMOptions.cmake: Reorder __STDC_CONSTANT_MACROS and __STDC_LIMIT_MACROS. by NAKAMURA Takumi · 13 years ago
  29. 884b918 Add support for legalization of vector trunc-store where the saved scalar type is illegal (for example, v2i16 on systems where the smallest store size is i32) by Nadav Rotem · 13 years ago
  30. c2b2e13 Cleanup the trunc-store legalization code and add asserts. by Nadav Rotem · 13 years ago
  31. eb13b61 Update to a newer doxygen version. PR8214. Patch by Jeremy Huddleston. by Bill Wendling · 13 years ago
  32. c48b301 Add HasPOPCNT predicate to the POPCNT instructions. Also mark POPCNT as modifying EFLAGS. by Craig Topper · 13 years ago
  33. b99d5b0 Minor modifications to make the Hello World example resemble the Hello World by Bill Wendling · 13 years ago
  34. 227358e Make Ivy Bridge 16-bit floating point conversion instructions require AVX. by Craig Topper · 13 years ago
  35. b1b8f5f Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take by Nick Lewycky · 13 years ago
  36. a6f386b Test case for X86 LZCNT instruction selection. by Craig Topper · 13 years ago
  37. 37f2167 Add X86 LZCNT instruction. Including instruction selection support. by Craig Topper · 13 years ago
  38. f7f0610 Use the proper name for "externally visible" linkage -- 'external'. This is the by Bill Wendling · 13 years ago
  39. 3478173 Reword the SetVector description to reflect reality. Patch by Michael Ilseman! by Bill Wendling · 13 years ago
  40. 66b20c4 Add a test for PR10565. by Cameron Zwarich · 13 years ago
  41. 446d952 Remove a lot of the fancy scalar replacement code for dealing with llvm-gcc's by Cameron Zwarich · 13 years ago
  42. 3606f75 Test simplification that Ana Pazos noticed. by Bill Wendling · 13 years ago
  43. 29480fd Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist. by Craig Topper · 13 years ago
  44. 7aabcb1 Also create a shndx even if there are no symbols. This lets us test by Nick Lewycky · 13 years ago
  45. b1044b0 test/CodeGen/X86/movbe.ll: Give explicit -mtriple=x86_64-linux, to unbreak win32 hosts. by NAKAMURA Takumi · 13 years ago
  46. bfbbe32 Reapply r141605 with fixes for appropriate handling of reserved section numbers by Nick Lewycky · 13 years ago
  47. 15c3f72 Add support for .symtab_shnidx. Unfortunately, doing this required breaking a by Nick Lewycky · 13 years ago
  48. a02bfce Add experimental -enable-lsr-phielim option. by Andrew Trick · 13 years ago
  49. 2044941 Move replaceCongruentIVs into SCEVExapander and bias toward "expanded" IVs. by Andrew Trick · 13 years ago
  50. b58078b Test cases for 64-bit load and store instructions. by Akira Hatanaka · 13 years ago
  51. eafc819 Added a testcase for r141599, rdar://problem/10063881. by Lang Hames · 13 years ago
  52. 1acb7df Make changes necessary for supporting floating point load and store instructions by Akira Hatanaka · 13 years ago
  53. 142bd1a Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo(). by Jakob Stoklund Olesen · 13 years ago
  54. a5903ac Modify lowering of GlobalAddress so that correct code is emitted when target is by Akira Hatanaka · 13 years ago
  55. 4ad06e6 Fixed natural stack alignment for Linux x86-32. Thanks Eli. by Lang Hames · 13 years ago
  56. 381e97d Modify MipsDAGToDAGISel::SelectAddr so that it can handle 64-bit pointers too. by Akira Hatanaka · 13 years ago
  57. fb05d3d Revert r141605 as it broke tests for llvm-nm. by Nick Lewycky · 13 years ago
  58. 43aed32 Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot. by Akira Hatanaka · 13 years ago
  59. 7bd19bd Add definitions of 64-bit loads and stores. Add a patterns for unaligned by Akira Hatanaka · 13 years ago
  60. 26e8ca3 Add testcase for PR11107. by Bill Wendling · 13 years ago
  61. f1f1a4f Make it possible to use the linker without destroying the source module. This is so the source module can be linked to multiple other destination modules. For all that used LinkModules() before, they will continue to destroy the source module as before. by Tanya Lattner · 13 years ago
  62. fad138d Add support for reading many-section ELF files. by Nick Lewycky · 13 years ago
  63. d55bb38 Change definitions of classes LoadM and StoreM in preparation for adding support by Akira Hatanaka · 13 years ago
  64. 3f56d4b Simplify check that optional def is there and is CPSR. by Bill Wendling · 13 years ago
  65. bb5b3f3 Add a natural stack alignment field to TargetData, and prevent InstCombine from by Lang Hames · 13 years ago
  66. 15565ad Fix warning. by Michael J. Spencer · 13 years ago
  67. db7334d Revert r141569 and r141576. by Devang Patel · 13 years ago
  68. f6c35c5 Simplify operand Kind checks a bit. by Jim Grosbach · 13 years ago
  69. ef2c86f Reapply r141365 now that PR11107 is fixed. by Bill Wendling · 13 years ago
  70. 38fbe32 Add a name to sub-operand for clarity. by Jim Grosbach · 13 years ago
  71. 721e1d2 If the CPSR is defined by a copy, then we don't want to merge it into an IT by Bill Wendling · 13 years ago
  72. dca62d5 Make sure the X86 backend doesn't explode on 128-bit shuffles in AVX mode. Fixes PR11102. by Eli Friedman · 13 years ago
  73. e2f2f07 Object: add getSectionAlignment. by Michael J. Spencer · 13 years ago
  74. 023bb15 Add support for dumping section headers to llvm-objdump. This uses the same by Nick Lewycky · 13 years ago
  75. 735fe0f Give targets a chance to expand even standard pseudos. by Jakob Stoklund Olesen · 13 years ago
  76. 6b50bc9 If loop header is also loop exiting block then it may not be safe to hoist instructions. by Devang Patel · 13 years ago
  77. 819a2ab Emit full ED initializers even for pseudo-instructions. by Jakob Stoklund Olesen · 13 years ago
  78. 8cc4769 Allow stat += 0 without activating the stat. by Andrew Trick · 13 years ago
  79. b35e4e8 whitespace by Andrew Trick · 13 years ago
  80. 717073c X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy bridge. by Benjamin Kramer · 13 years ago
  81. a7934dd Fix 10892 - When lowering SIGN_EXTEND_INREG do not lower v2i64 because the by Nadav Rotem · 13 years ago
  82. 9ac743a Add dominance check for the instruction being hoisted. by Devang Patel · 13 years ago
  83. 5a57168 Mark the standard pseudos as isPseudo = 1. by Jakob Stoklund Olesen · 13 years ago
  84. 9d2fa87 The Mips specific function for instruction cache invalidation cannot be by Bruno Cardoso Lopes · 13 years ago
  85. a86a586 X86: Add patterns for the movbe instruction (mov + bswap, only available on atom) by Benjamin Kramer · 13 years ago
  86. a0ed0c0 Insert dummy ED table entries for pseudo-instructions. by Jakob Stoklund Olesen · 13 years ago
  87. eba564c Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame to by Bill Wendling · 13 years ago
  88. 042aadd MCAtom extending methods need to extend the range of the atom as well. by Owen Anderson · 13 years ago
  89. 475fa26 Mark the llvm.eh.sjlj.functioncontext intrinsic as reading memory so that fast by Bill Wendling · 13 years ago
  90. d226ed71 llvm-objdump: Take ownership of MCInstrInfos. by Benjamin Kramer · 13 years ago
  91. 1a9908d llvm-nm: Don't leak bitcode buffers. by Benjamin Kramer · 13 years ago
  92. 5d53ff5 XFAIL tblgen tests on leak checkers. by Benjamin Kramer · 13 years ago
  93. 8129d21 When getting the number of bits necessary for addressing mode by Bill Wendling · 13 years ago
  94. 1f10480 Put a bunch of calls to ToggleFeature behind proper if statements. by Craig Topper · 13 years ago
  95. 29b9d7e Fix a regression from r138445. If we're loading from the frame/base pointer by Chad Rosier · 13 years ago
  96. 68226a4 PTX: Print .ptr kernel attributes if PTX version >= 2.2 by Justin Holewinski · 13 years ago
  97. da39404 Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler. by Craig Topper · 13 years ago
  98. b7994fe Prevent potential NOREX bug. by Jakob Stoklund Olesen · 13 years ago
  99. ed74482 Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies. by Jakob Stoklund Olesen · 13 years ago
  100. a55f657 Add missing test case for r141410. by Jakob Stoklund Olesen · 13 years ago