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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 693f541526cdd5f084adc5b8a5a5b290401a0b8e / lib / Target / ARM / ARMInstrInfo.cpp
  1. 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
  2. 66a2a8f ARM: make branch folder remove unconditional branches by Dale Johannesen · 18 years ago
  3. 13ab020 Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. by Evan Cheng · 18 years ago
  4. 4b9cb7d Incorrect check. by Evan Cheng · 18 years ago
  5. 0e1d379 Reflects the chanegs made to PredicateOperand. by Evan Cheng · 18 years ago
  6. d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 18 years ago
  7. 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 18 years ago
  8. eaa91b0 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 18 years ago
  9. d42e56e Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt. by Evan Cheng · 18 years ago
  10. 13e8b51 Handle blocks with 2 unconditional branches in AnalyzeBranch. by Dale Johannesen · 18 years ago
  11. bfd2ec4 Add a utility routine to check for unpredicated terminator instruction. by Evan Cheng · 18 years ago
  12. 1fc7cb6 Fix ARM condition code subsumission check. by Evan Cheng · 18 years ago
  13. 9328c1a Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks. by Evan Cheng · 18 years ago
  14. 62ccdbf Add missing const qualifiers. by Evan Cheng · 18 years ago
  15. 69d5556 Hooks for predication support. by Evan Cheng · 18 years ago
  16. 94679e6 Fix some -march=thumb regressions. tBR_JTr is not predicable. by Evan Cheng · 18 years ago
  17. 5a18ebc BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd. by Evan Cheng · 18 years ago
  18. 6ae3626 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 18 years ago
  19. 02c602b PredicateInstruction returns true if the operation was successful. by Evan Cheng · 18 years ago
  20. b5f8eff Removed isPredicable(). by Evan Cheng · 18 years ago
  21. 9307292 Hooks for predication support. by Evan Cheng · 18 years ago
  22. 44bec52 Add PredicateOperand to all ARM instructions that have the condition field. by Evan Cheng · 18 years ago
  23. 8593e41 Rewrite of Thumb constant islands handling (exact allowance for padding by Dale Johannesen · 18 years ago
  24. faa5107 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. by Evan Cheng · 18 years ago
  25. 1e341729 Relex assertions to account for additional implicit def / use operands. by Evan Cheng · 18 years ago
  26. bed2946 Removed tabs everywhere except autogenerated & external files. Add make by Anton Korobeynikov · 18 years ago
  27. 3c5ad82 Inverted logic. by Evan Cheng · 18 years ago
  28. f6fa5ee findRegisterUseOperand() changed. by Evan Cheng · 18 years ago
  29. 9f6636f Fix naming inconsistencies. by Evan Cheng · 18 years ago
  30. 8e59ea9 Spill / restore should avoid modifying the condition register. by Evan Cheng · 19 years ago
  31. ad1b9a5 Copy and paste bug. by Evan Cheng · 19 years ago
  32. c322a9a Misseed thumb jumptable branch. by Evan Cheng · 19 years ago
  33. 29836c3 Factor GetInstSize() out of constpool island pass. by Evan Cheng · 19 years ago
  34. 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 19 years ago
  35. a8e2989 ARM backend contribution from Apple. by Evan Cheng · 19 years ago
  36. c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
  37. 3d7d39a fix warning about missing newline at end of file by Rafael Espindola · 19 years ago
  38. 578e64a implement uncond branch insertion, mark branches with isBranch. by Chris Lattner · 19 years ago
  39. 3ad5e5c add shifts to addressing mode 1 by Rafael Espindola · 19 years ago
  40. 7cca7c5 partial implementation of the ARM Addressing Mode 1 by Rafael Espindola · 19 years ago
  41. 46adf81 change the addressing mode of the str instruction to reg+imm by Rafael Espindola · 19 years ago
  42. aefe142 create the raddr addressing mode that matches any register and the frame index by Rafael Espindola · 19 years ago
  43. 49e4415 handle the "mov reg1, reg2" case in isMoveInstr by Rafael Espindola · 19 years ago
  44. 4b442b5 implement minimal versions of by Rafael Espindola · 19 years ago
  45. 7bc59bc added a skeleton of the ARM backend by Rafael Espindola · 19 years ago