- bf9ab93 lli should create a JIT memory manager. by Jim Grosbach · 13 years ago
- fae699a Fix assert. by Eric Christopher · 13 years ago
- 08713b3 Disable the crash reporter when running lit tests. by Argyrios Kyrtzidis · 13 years ago
- c8d12ee On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used. by Nadav Rotem · 13 years ago
- 3bf052b Check to make sure that the CFString's back store ends up in the correct section. by Bill Wendling · 13 years ago
- 2028b79 Support segmented stacks on mac. by Rafael Espindola · 13 years ago
- 7692ce9 Split segmented stacks tests into tests for static- and dynamic-size frames. by Rafael Espindola · 13 years ago
- 25cd4ff Generate the segmented stack prologue for fastcc too. Patch by Brian Anderson. by Rafael Espindola · 13 years ago
- 11f0e7b Revert r147945 which disabled an addressing mode transformation. I had by Chandler Carruth · 13 years ago
- 313c703 Use unsigned comparison in segmented stack prologue. by Rafael Espindola · 13 years ago
- bcb55ce [asan] extend the workaround for http://llvm.org/bugs/show_bug.cgi?id=11395: don't instrument the function at all on x86_32 if it has a large asm blob by Kostya Serebryany · 13 years ago
- 014f7a3 Explicitly set the scale to 1 on some segstack prologue instrs. by Rafael Espindola · 13 years ago
- 8704b78 The error check for using -g with a .s file already containing dwarf .file by Kevin Enderby · 13 years ago
- 46df3ad Add XOP Intrinsics and tests by Jan Sjödin · 13 years ago
- 394a1f5 Fix a bug in the lowering of BUILD_VECTOR for AVX. SCALAR_TO_VECTOR does not zero untouched elements. Use INSERT_VECTOR_ELT instead. by Nadav Rotem · 13 years ago
- 1876abe Don't try to create a GEP when the pointee type is unsized (such GEPs by Duncan Sands · 13 years ago
- e4bc80a Disable the transformation I added in r147936 to see if it fixes some by Chandler Carruth · 13 years ago
- d65a910 Hoist a really redundant code pattern into a helper function, and delete by Chandler Carruth · 13 years ago
- 93b7358 Simplify the AND-rooted mask+shift checking code to match that of the by Chandler Carruth · 13 years ago
- dddcd78 Unify the interface of the three mask+shift transform helpers, and by Chandler Carruth · 13 years ago
- fde2c1a Clarify and make explicit some of the requirements for transforming by Chandler Carruth · 13 years ago
- dec1f99 Fix undefined code and reenable test case. by Jakob Stoklund Olesen · 13 years ago
- 6ae18e5 Hoist the logic to transform shift+mask combinations into sub-register by Chandler Carruth · 13 years ago
- f103b3d Teach the X86 instruction selection to do some heroic transforms to by Chandler Carruth · 13 years ago
- 88c5c42 Improved compile time: by Stepan Dyatkovskiy · 13 years ago
- 69b5df8 llvm/test/CodeGen/X86/zext-fold.ll: Relax an expression in stack offset. by NAKAMURA Takumi · 13 years ago
- 29cc410 llvm/test/CodeGen/X86/sub-with-overflow.ll: Add explicit -mtriple=i686-linux. by NAKAMURA Takumi · 13 years ago
- 3eada31 Clarified the SCEV getSmallConstantTripCount interface with in-your-face comments. by Andrew Trick · 13 years ago
- 29a1714 Add big endian mips support. Based on a patch by Jack Carter. by Rafael Espindola · 13 years ago
- fddf804 Add the skeleton of an asm parser for mips. by Rafael Espindola · 13 years ago
- 08c6664 ARM Ld/St Optimizer fix. by Andrew Trick · 13 years ago
- bc9beda Disable test that seems to expose an unrelated Linux issue. by Jakob Stoklund Olesen · 13 years ago
- 2aad2f6 Detect when a value is undefined on an edge to a landing pad. by Jakob Stoklund Olesen · 13 years ago
- 74c4f97 Exclusively use SplitAnalysis::getLastSplitPoint(). by Jakob Stoklund Olesen · 13 years ago
- f96703e Avoid CSE of instructions which define physical registers across MBBs unless by Evan Cheng · 13 years ago
- 37b94c6 If the global variable is removed by the linker, then don't constant merge it by Bill Wendling · 13 years ago
- dcc296d Don't avoid recursing for pointer types, just reference types. Expand on by Eric Christopher · 13 years ago
- eab3027 Add test case for r147881. by Chad Rosier · 13 years ago
- 9ffaa6a Fixed order of operands in comment to match code. by Lang Hames · 13 years ago
- 216f637 Default stack alignment for 32bit x86 should be 4 Bytes, not 8 Bytes. by Joerg Sonnenberger · 13 years ago
- 19d0bf3 Consider unknown alignment caused by OptimizeThumb2Instructions(). by Jakob Stoklund Olesen · 13 years ago
- 75fda5d 80 col violation. by Evan Cheng · 13 years ago
- 1b2983b Add missing VEX predicates to VMOVSDto64rr/VMOVSDto64mr. This fixes a few by Chad Rosier · 13 years ago
- a005c31 Let asm parser query asm syntax dialect. by Devang Patel · 13 years ago
- 11c2def This is the matching change for the data structure name changes for the by Kevin Enderby · 13 years ago
- f1f16c8 ARM updating VST2 pseudo-lowering fixed vs. register update. by Jim Grosbach · 13 years ago
- e4ad582 Fix some leftover control reaches end of non-void function warnings. by Benjamin Kramer · 13 years ago
- fd553c2 Teach the triple library about the androideabi environment. by Chandler Carruth · 13 years ago
- ea7ad3b Move default case for covered enum outside of switch. by Richard Smith · 13 years ago
- f6c0747 For i386, don't use the generic code. by Bill Wendling · 13 years ago
- 95789d0 Fix a -Wreturn-type warning in g++. by Richard Smith · 13 years ago
- b0dc4d9 Cleanup these asserts to follow common LLVM style and coding by Chandler Carruth · 13 years ago
- 732f05c Add 'llvm_unreachable' to passify GCC's understanding of the constraints by Chandler Carruth · 13 years ago
- 38fdb7d Various crash reporting tools have a problem with the dwarf generated for by Kevin Enderby · 13 years ago
- 4ba0e75 Add definition for intel asm variant. by Devang Patel · 13 years ago
- 56315d3 Record asm variant id in MatchEntry and check it while matching instruction. by Devang Patel · 13 years ago
- 2bd3354 Remove unnecessary default cases in switches that cover all enum values. by David Blaikie · 13 years ago
- 6c0366c Fix a bug in the legalization of shuffle vectors. When we emulate shuffles using BUILD_VECTORS we may be using a BV of different type. Make sure to cast it back. by Nadav Rotem · 13 years ago
- 66a7fd7 Add definitions for AMD's bobcat (aka btver1) by Benjamin Kramer · 13 years ago
- a937633 Fix a crash in AVX2 when trying to broadcast a double into a 128-bit vector. There is no vbroadcastsd xmm, but we do need to support 64-bit integers broadcasted into xmm. Also factor the AVX check into the isVectorBroadcast function. This makes more sense since the AVX2 check was already inside. by Craig Topper · 13 years ago
- 1accb7e Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is the final piece to remove the AVX hack that disabled SSE. by Craig Topper · 13 years ago
- d0a3117 Remove hasSSE*orAVX functions and change all callers to use just hasSSE*. AVX is now an SSE level and no longer disables SSE checks. by Craig Topper · 13 years ago
- c6d5995 Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicates. Another commit will remove orAVX functions from X86SubTarget. by Craig Topper · 13 years ago
- 97b5beb Allow machine-cse to look across MBB boundary when cse'ing instructions that by Evan Cheng · 13 years ago
- 64925c5 Enable LSR IV Chains with sufficient heuristics. by Andrew Trick · 13 years ago
- dae412b Accurately model hardware alignment rounding. by Jakob Stoklund Olesen · 13 years ago
- 9cce24a Remove the logging streamer. by Rafael Espindola · 13 years ago
- 169db15 Catch runaway ARMConstantIslandPass even in -Asserts builds. by Jakob Stoklund Olesen · 13 years ago
- c16d96f Fix asm string wrt variants. by Devang Patel · 13 years ago
- d06b01c Use descriptive variable name and remove incorrect operand number check. by Devang Patel · 13 years ago
- 22d20c2 Adding IV chain generation to LSR. by Andrew Trick · 13 years ago
- 6c7d0ae Adding collection of IV chains to LSR. by Andrew Trick · 13 years ago
- 0dbcada Split AsmParser into two components - AsmParser and AsmParserVariant by Devang Patel · 13 years ago
- 8bf295b "Minor LSR debugging stuff" by Andrew Trick · 13 years ago
- bc44b9f Update language check. Do not ignore DW_LANG_Python. Patch by Joe Groff! by Devang Patel · 13 years ago
- 7e4ac32 Move assert to the right place. by Benjamin Kramer · 13 years ago
- 47a8607 InstCombine: Teach foldLogOpOfMaskedICmpsHelper that sign bit tests are bit tests. by Benjamin Kramer · 13 years ago
- 4e3a402 Don't rely on the fact that shift values are never very large, and thus by Chandler Carruth · 13 years ago
- a7cb699 Cleanup and FileCheck-ize a test. by Chandler Carruth · 13 years ago
- 16de463 Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Predicate functions have been altered to maintain previous names and behavior. by Craig Topper · 13 years ago
- 8ffc964 Add HasAVX predicate to some of the AVX patterns. by Craig Topper · 13 years ago
- 47cf100 Reorder a bunch of patterns to put the AVX version first thus giving it priority over the SSE version. Another step towards trying to remove the AVX hack that disables SSE from X86Subtarget. by Craig Topper · 13 years ago
- 5feb5da Clean up patterns for MOVNT*. Not sure why there were floating point types on MOVNTPS and MOVNTDQ. And v4i64 was completely missing. by Craig Topper · 13 years ago
- 8974cd8 Mark MOVNTI as being supported in SSE2 OR AVX mode. This instruction has no AVX equivalent so we should use the SSE version. by Craig Topper · 13 years ago
- dfa5f57 Move SSE2 logical operations PAND/POR/PXOR/PANDN above SSE1 logical operations ANDPS/ORPS/XORPS/ANDNPS. This fixes a pattern ordering issue that meant that the SSE2 instructions could never be directly selected since the SSE1 patterns would always match first. This is largely moot with the ExeDepsFix pass, but I'm trying to audit for all such ordering issues. by Craig Topper · 13 years ago
- 6202e45 Change some places that were checking for AVX OR SSE1/2 to use hasXMM/hasXMMInt instead. Also fix one place that checked SSE3, but accidentally excluded AVX to use hasSSE3orAVX. This is a step towards removing the AVX hack from the X86Subtarget.h by Craig Topper · 13 years ago
- 1fe9737 Don't print an unused label before .cfi_endproc. by Rafael Espindola · 13 years ago
- 39f227e Don't disable MMX support when AVX is enabled. Fix predicates for MMX instructions that were added along with SSE instructions to check for AVX in addition to SSE level. by Craig Topper · 13 years ago
- a8224dd Enable FISTTP* instructions when AVX is enabled. by Craig Topper · 13 years ago
- d4242d8 Tweak my last commit to be less conservative about uses. by Benjamin Kramer · 13 years ago
- 79aa048 Don't forget to transfer implicit uses of return instruction. by Evan Cheng · 13 years ago
- e811d0d Avoid eraseing copies from a reserved register unless the definition can be by Evan Cheng · 13 years ago
- dfb806f InstCombine: If we have a bit test and a sign test anded/ored together, merge the sign bit into the bit test. by Benjamin Kramer · 13 years ago
- 435d0bd Reverted commit #147601 upon Evan's request. by Victor Umansky · 13 years ago
- f340a29 Remove MCELFStreamer.h. by Rafael Espindola · 13 years ago
- 547be26 Don't print a label before .cfi_startproc when we don't need to. This makes by Rafael Espindola · 13 years ago
- 86132a7 Make clever use of alignment and padding to shrink GlobalValue. by Benjamin Kramer · 13 years ago
- 8f37a24 Match SelectionDAG logic for enabling movt. by Jakob Stoklund Olesen · 13 years ago
- eb3d460 Fix typo in the X86 backend readme. Patch from Jaeden Amero. by Craig Topper · 13 years ago
- f321e10 Remove VectorExtras. This unused helper was written for a type of API that is discouraged now. by Benjamin Kramer · 13 years ago