- 763a75d ARM: support struct byval in llvm by Manman Ren · 12 years ago
- cdd6b2d Fix 80 columns. by Michael J. Spencer · 12 years ago
- fc4199b Add support for enum forward declarations. by Eric Christopher · 12 years ago
- 547d804 Put the shiny new MCSubRegIterator to work. by Chad Rosier · 12 years ago
- 1cbf2be add -bounds-checking-multiple-traps option to make one trap BB per check by Nuno Lopes · 12 years ago
- 0463cce revamp BoundsChecking considerably: by Nuno Lopes · 12 years ago
- ee66b41 Add support for return value promotion in X86 calling conventions. by Jakob Stoklund Olesen · 12 years ago
- 91c5346 X86: replace SUB with CMP if possible by Manman Ren · 12 years ago
- 5ddc04c Add a PrintRegUnit helper similar to PrintReg. by Jakob Stoklund Olesen · 12 years ago
- 703360f Fix typos by Joel Jones · 12 years ago
- a1b95f5 Fix typos noticed by Benjamin Kramer. by Rafael Espindola · 12 years ago
- c8e340d X86: Rename the CLMUL target feature to PCLMUL. by Benjamin Kramer · 12 years ago
- c49b29e Require intervals in the range metadata to be in a canonical form: They must by Rafael Espindola · 12 years ago
- 177cf1e Added FMA3 Intel instructions. by Elena Demikhovsky · 12 years ago
- 53b4177 Enhance the sinking code to handle diamond patterns. Patch by by Duncan Sands · 12 years ago
- 0559a2f Add intrinsic for pclmulqdq instruction. by Craig Topper · 12 years ago
- 28ee4fd Cleanup and factoring of mips16 tablegen classes. Make register classes by Akira Hatanaka · 12 years ago
- feba193 Fix typo in assembly directive. Noticed by inspection. by Eric Christopher · 12 years ago
- 4c91bda Avoid depending on list orders and register numbering. by Jakob Stoklund Olesen · 12 years ago
- 4aecc76 Extract some pointer hacking to a function. by Jakob Stoklund Olesen · 12 years ago
- 9cda1be Prioritize smaller register classes for urgent evictions. by Jakob Stoklund Olesen · 12 years ago
- 6ab75b4 Add support for the mips inline asm 'm' output modifier. by Eric Christopher · 12 years ago
- f917d20 Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention. by Owen Anderson · 12 years ago
- 85ef6f4 Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node. by Owen Anderson · 12 years ago
- 06a23ea Remove extra space. by Chad Rosier · 12 years ago
- 127563b Make sure that we're dealing with a binary SCEVExpr when simplifying. by Benjamin Kramer · 12 years ago
- 6c82382 Fix some uses of getSubRegisters() to use getSubReg() instead. by Jakob Stoklund Olesen · 12 years ago
- 275fd25 Remove some redundant tests. by Jakob Stoklund Olesen · 12 years ago
- 6cf07a8 Teach SCEV's icmp simplification logic that a-b == 0 is equivalent to a == b. by Benjamin Kramer · 12 years ago
- f186df0 it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more. by Chris Lattner · 12 years ago
- 5aaabbf Extend the (abi-irrelevant) return convention to be able to return more than two values in by Chris Lattner · 12 years ago
- ada759d [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic. by Chad Rosier · 12 years ago
- 77fc4b2 Port support for SSE4a extrq/insertq to the old jit code emitter. by Benjamin Kramer · 12 years ago
- e6cf2e0 [asan] instrument cmpxchg and atomicrmw by Kostya Serebryany · 12 years ago
- fe3516f SCEV: Handle a corner case reducing AddRecExpr * AddRecExpr by Andrew Trick · 12 years ago
- 97178ae Reformat the loop that does AddRecExpr * AddRecExpr reduction. by Andrew Trick · 12 years ago
- eb25bd2 Teach taildup to update livein set. rdar://11538365 by Evan Cheng · 12 years ago
- 3d4166d If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs. by Evan Cheng · 12 years ago
- 6e1b812 Add an insertPass API to TargetPassConfig. <rdar://problem/11498613> by Bob Wilson · 12 years ago
- 988a089 bounds checking: by Nuno Lopes · 12 years ago
- cac58aa Optional def can be either a def or a use (of reg0). by Evan Cheng · 12 years ago
- 1386e9b Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. by Benjamin Kramer · 12 years ago
- f905f69 Clear the entering, exiting and internal ranges of a bundle before collecting by Lang Hames · 12 years ago
- e236429 Update CPPBackend to new API for AttrListPtr::get. by Nicolas Geoffray · 12 years ago
- 0aa32d5 ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to IntegersSubsetMapping. by Stepan Dyatkovskiy · 12 years ago
- b34d3aa Add llvm.fabs intrinsic. by Peter Collingbourne · 12 years ago
- 7bb9f06 Fix suspicous hasOneUse() check, found by PVS Studio (PR12357). by Benjamin Kramer · 12 years ago
- 37fa1c8 InstCombine: Fix infinite loop when encountering switch on trivial icmp. by Benjamin Kramer · 12 years ago
- 21280e4 Remove unused variable. by David Blaikie · 12 years ago
- e99f8be PR12696: Attribute bits above 1<<30 are not encoded in bitcode by Meador Inge · 12 years ago
- f52aea8 Random BitcodeReader cleanups. by Benjamin Kramer · 12 years ago
- 484fc93 PR1255: Case Ranges by Stepan Dyatkovskiy · 12 years ago
- 77b1913 Implement the indirect counter increment code in a better way. Instead of by Bill Wendling · 12 years ago
- d509d0b switch AttrListPtr::get to take an ArrayRef, simplifying a lot of clients. by Chris Lattner · 12 years ago
- 2a9d3b7 simplify code. by Chris Lattner · 12 years ago
- 6519541 PR12967: Don't crash when trying to fold a shift that's larger than the type's size. by Benjamin Kramer · 12 years ago
- 55dc5c7 Reimplement the intrinsic verifier to use the same table as Intrinsic::getDefinition, by Chris Lattner · 12 years ago
- 27302f0 Have getOrCreateSubprogramDIE store the DIE for a subprogram by Peter Collingbourne · 12 years ago
- 908a831 move some code around so that Verifier.cpp can get access to the intrinsic info table. by Chris Lattner · 12 years ago
- b4654c1 enhance the intrinsic info table to encode what *kind* of Any argument by Chris Lattner · 12 years ago
- 542c063 Path::GetTemporaryDirectory(): Add an assertion if TempDirectory is alive, to check when someone would remove the tempdir. by NAKAMURA Takumi · 12 years ago
- cf1d69d Missed parens. by Benjamin Kramer · 12 years ago
- 4fae58b r157525 didn't work, just disable iterator checking. by Benjamin Kramer · 12 years ago
- dc54f8e SDAGBuilder: Avoid iterator invalidation harder. by Benjamin Kramer · 12 years ago
- 5db954d SDAGBuilder: Don't create an invalid iterator when there is only one switch case. by Benjamin Kramer · 12 years ago
- c511b2a SelectionDAGBuilder: When emitting small compare chains for switches order them by using edge weights. by Benjamin Kramer · 12 years ago
- eacc31a Since commit 157467, if reassociate isn't actually going to change an expression by Duncan Sands · 12 years ago
- 3e933ec SimplifyCFG: Turn the ad-hoc std::pair that represents switch cases into an explicit struct. by Benjamin Kramer · 12 years ago
- 937338c Add support for branch weight metadata to MDBuilder and use it in various places. by Benjamin Kramer · 12 years ago
- 9632f77 ScoreboardHazardRecognizer: Remove dead conditional in debug code. by Benjamin Kramer · 12 years ago
- 24dfa52 Move this debug statement earlier so it is easy to see the order in by Duncan Sands · 12 years ago
- c7a8840 The llvm_gcda_increment_indirect_counter function writes to the arguments that by Bill Wendling · 12 years ago
- 3ad21be Fix predicate HasStandardEncoding in MipsInstrInfo.td per suggestion of by Akira Hatanaka · 12 years ago
- d72d67d bounds checking: add support for byval arguments by Nuno Lopes · 12 years ago
- 06a2f42 Delete MipsExpandPseudo.cpp. by Akira Hatanaka · 12 years ago
- 564f690 Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo. by Akira Hatanaka · 12 years ago
- 8951abd Remove the code that expands MIPS' .cpload directive. by Akira Hatanaka · 12 years ago
- 6a1a2b1 Remove the code that emits MIPS' .cprestore directive. by Akira Hatanaka · 12 years ago
- 65d5629 Remove pseudo instructions that are no longer used. by Akira Hatanaka · 12 years ago
- 6a06e68 boundschecking: by Nuno Lopes · 12 years ago
- d2ea0e1 Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall by Justin Holewinski · 12 years ago
- 0fd120b Make the reassociation pass more powerful so that it can handle expressions by Duncan Sands · 12 years ago
- c7a098f misched: trace formatting by Andrew Trick · 12 years ago
- d5ce3ff Compress MCRegisterInfo register name tables. by Jakob Stoklund Olesen · 12 years ago
- 2db0e9e Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. by Eli Friedman · 12 years ago
- 5402efa Silence unused variable warnings from when assertions are disabled. by Kaelyn Uhrain · 12 years ago
- 8ddd9d5 misched: Use the same scheduling heuristics with -misched-topdown/bottomup. by Andrew Trick · 12 years ago
- b1ebd69 Shrink. by Jakob Stoklund Olesen · 12 years ago
- fae8b1d Add support for range expressions in TableGen foreach loops. by Jakob Stoklund Olesen · 12 years ago
- 72cba6c Don't put TGParser scratch results in the output. by Jakob Stoklund Olesen · 12 years ago
- 8e5286e Simplify TGParser::ProcessForEachDefs. by Jakob Stoklund Olesen · 12 years ago
- bb0a242 misched: Trace regpressure. by Andrew Trick · 12 years ago
- f323424 misched: Give each ReadyQ a unique ID by Andrew Trick · 12 years ago
- 0a39d4e misched: Added ScoreboardHazardRecognizer. by Andrew Trick · 12 years ago
- 2aa689d misched: Release bottom roots in reverse order. by Andrew Trick · 12 years ago
- 8c2d921 misched: rename ReadyQ class by Andrew Trick · 12 years ago
- c8fe4ec misched: copy comments so compareRPDelta is readable by itself. by Andrew Trick · 12 years ago
- 5f887fa regpressure: Added RegisterPressure::dump by Andrew Trick · 12 years ago
- a7de4b9 regpressure: physreg livein/out fix by Andrew Trick · 12 years ago
- 42a0b48 Remove the PTX back-end and all of its artifacts (triple, etc.) by Justin Holewinski · 12 years ago