- 79ce276 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph by Dan Gohman · 17 years ago
- e5ad88e Preliminary ARM debug support based on patch by Mikael of FlexyCore. by Evan Cheng · 17 years ago
- f033b5a Update a comment. by Dan Gohman · 17 years ago
- 8be6bbe Eliminate the ISel priority queue, which used the topological order for a by Dan Gohman · 17 years ago
- 8ad4c00 by David Greene · 17 years ago
- da8ac5f Avoid creating two TargetLowering objects for each target. by Dan Gohman · 17 years ago
- 3f7eb8e Cosmetic. by Evan Cheng · 17 years ago
- f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 17 years ago
- ba36cb5 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics by Gabor Greif · 17 years ago
- 99a6cb9 disallow direct access to SDValue::ResNo, provide a getter instead by Gabor Greif · 17 years ago
- f350b27 Move the point at which FastISel taps into the SelectionDAGISel by Dan Gohman · 17 years ago
- ad3460c Simplify SelectRoot's interface, and factor out some common code by Dan Gohman · 17 years ago
- 475871a Rename SDOperand to SDValue. by Dan Gohman · 17 years ago
- e8be6c6 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk by Dan Gohman · 17 years ago
- 1002c02 Add explicit keywords. by Dan Gohman · 17 years ago
- db8d56b Split scheduling from instruction selection. by Evan Cheng · 17 years ago
- 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 17 years ago
- 4e3f5a4 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. by Evan Cheng · 18 years ago
- 3d62d78 explicitly include Compiler.h instead of getting it from tblgen in the middle of a class. by Chris Lattner · 18 years ago
- a47b9bc don't do ReplaceUses on a result that doesn't exist. by Chris Lattner · 18 years ago
- a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
- b625f2f Factor the addressing mode and the load/store VT out of LoadSDNode by Dan Gohman · 18 years ago
- 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 18 years ago
- 13ab020 Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. by Evan Cheng · 18 years ago
- ee568cf Unfortunately we now require C++ code to isel Bcc, conditional moves, etc. by Evan Cheng · 18 years ago
- 44bec52 Add PredicateOperand to all ARM instructions that have the condition field. by Evan Cheng · 18 years ago
- 7293912 match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll by Chris Lattner · 18 years ago
- 9f6636f Fix naming inconsistencies. by Evan Cheng · 18 years ago
- fa775d0 Special LDR instructions to load from non-pc-relative constantpools. These are by Evan Cheng · 18 years ago
- a13fd10 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] by Evan Cheng · 18 years ago
- 8fdbe56 Get rid of references to iostream. by Evan Cheng · 19 years ago
- 8c1a73a Select add FI, c correctly. by Evan Cheng · 19 years ago
- ad0e465 - Store val, [sp, c] must be selected to tSTRsp. by Evan Cheng · 19 years ago
- cea117d Change the operand orders to t_addrmode_s* to make it easier to morph by Evan Cheng · 19 years ago
- 012f2d9 Use PC relative ldr to load from a constantpool in Thumb mode. by Evan Cheng · 19 years ago
- e966d64 Allow [ fi#c, imm ] as ARM load / store addresses. by Evan Cheng · 19 years ago
- 79d4326 Various Thumb mode load / store isel bug fixes. by Evan Cheng · 19 years ago
- c38f2bc - Reorg Thumb load / store instructions. Combine each rr and ri pair of by Evan Cheng · 19 years ago
- a8e2989 ARM backend contribution from Apple. by Evan Cheng · 19 years ago
- a38bbf7 Build constants using instructions mov/orr or mvn/eor. by Lauro Ramos Venancio · 19 years ago
- ca1f66d Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64). by Lauro Ramos Venancio · 19 years ago
- 9985f9f implement missing compares patch by Lauro bug fixed by me by Rafael Espindola · 19 years ago
- 4785781 For PR950: by Reid Spencer · 19 years ago
- 0cc2bd1 fix comment by Rafael Espindola · 19 years ago
- 301009a Implement SELECT_CC (f32/f64) for ARM. by Lauro Ramos Venancio · 19 years ago
- 8897a7b avoid using a constant table when a constant can be used inline by Rafael Espindola · 19 years ago
- a898ce6 more general matching of the MVN instruction by Rafael Espindola · 19 years ago
- 2426775 don't use "ordinary" addressing mode 1 when mvn is appropriate by Rafael Espindola · 19 years ago
- f64945d use MVN to handle small negative constants by Rafael Espindola · 19 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 19 years ago
- 97815c6 expand memmove and memcpy by Rafael Espindola · 19 years ago
- 462af9a add support for the "r" asm constraint patch by Lauro Ramos Venancio by Rafael Espindola · 19 years ago
- f819a49 implement load effective address similar to the alpha backend by Rafael Espindola · 19 years ago
- 0d53826 Match tblegen changes. by Evan Cheng · 19 years ago
- 6e8c649 initial implementation of addressing mode 2 TODO: fix lea_addri by Rafael Espindola · 19 years ago
- e931a37 move ARMCondCodeToString to ARMAsmPrinter.cpp by Rafael Espindola · 19 years ago
- c35497f All targets expand BR_JT for now. by Evan Cheng · 19 years ago
- 7ae68ab initial support for frame pointers by Rafael Espindola · 19 years ago
- 0e5e3aa expand ISD::VACOPY by Rafael Espindola · 19 years ago
- d8ed7f8 expand ISD::MEMSET by Rafael Espindola · 19 years ago
- b83eb64 For PR950: by Reid Spencer · 19 years ago
- 6495bdd expand SIGN_EXTEND_INREG by Rafael Espindola · 19 years ago
- 4749aa4 expand brind so that we don't have to implement jump tables right now by Rafael Espindola · 19 years ago
- 5f1b698 implement CallingConv::Fast as CallingConv::C by Rafael Espindola · 19 years ago
- 226f8bc expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM by Rafael Espindola · 19 years ago
- 32bd5f4 initial implementation of addressing mode 5 by Rafael Espindola · 19 years ago
- 0505be0 expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS by Rafael Espindola · 19 years ago
- d2b5668 expand ISD::BRCOND by Rafael Espindola · 19 years ago
- 6c5ae3e fix some fp condition codes use non trapping comparison instructions by Rafael Espindola · 19 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
- 26a76d1 implement calls to functions that return long by Rafael Espindola · 19 years ago
- 42b62f3 implement unordered floating point compares by Rafael Espindola · 19 years ago
- 493a7fc uint <-> double conversion by Rafael Espindola · 19 years ago
- b47e1d0 add double <-> int conversion by Rafael Espindola · 19 years ago
- 0d9fe76 compare doubles by Rafael Espindola · 19 years ago
- 4b20fbc initial support for fp compares. Unordered compares not implemented yet by Rafael Espindola · 19 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
- 48bc9fb expand ISD::SELECT by Rafael Espindola · 19 years ago
- ad557f9 expand ISD::EXTLOAD by Rafael Espindola · 19 years ago
- e5bbd6d implement FUITOS and FUITOD by Rafael Espindola · 19 years ago
- 935b1f8 add optional input flag to FMRRD by Rafael Espindola · 19 years ago
- 614057b add support for calling functions that return double by Rafael Espindola · 19 years ago
- af1dabe fix some bugs affecting functions with no arguments by Rafael Espindola · 19 years ago
- 4a408d4 add support for calling functions that have double arguments by Rafael Espindola · 19 years ago
- 786225a Make use of getStore(). by Evan Cheng · 19 years ago
- 39b5a21 use a const ref for passing the vector to ArgumentLayout by Rafael Espindola · 19 years ago
- a284584 implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL by Rafael Espindola · 19 years ago
- cd71da5 Implement floating point constants by Rafael Espindola · 19 years ago
- 9e071f0 fix the names of the 64bit fp register by Rafael Espindola · 19 years ago
- 2718519 add floating point registers implement SINT_TO_FP by Rafael Espindola · 19 years ago
- ebdabda more condition codes by Rafael Espindola · 19 years ago
- 7246d33 if a constant can't be an immediate, add it to the constant pool by Rafael Espindola · 19 years ago
- 3ad5e5c add shifts to addressing mode 1 by Rafael Espindola · 19 years ago
- c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 19 years ago
- 1b3956b add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 by Rafael Espindola · 19 years ago
- 7cca7c5 partial implementation of the ARM Addressing Mode 1 by Rafael Espindola · 19 years ago
- 3a02f02 add support for returning 64bit values by Rafael Espindola · 19 years ago
- bc4cec9 add the SETULT condition code by Rafael Espindola · 19 years ago