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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 7d6fe13efc9bcb69d3479e32f8eace933c5bd2d5 / lib / CodeGen / SelectionDAG / DAGCombiner.cpp
  1. d0cf258 Revert 122353-122355 for the moment, they broke stuff. by Dale Johannesen · 15 years ago
  2. a83bf35 Add a new transform to DAGCombiner. by Dale Johannesen · 15 years ago
  3. 5ecc340 Get the type of a shift from the shift, not from its shift by Dale Johannesen · 15 years ago
  4. efc96dd Shift by the word size is invalid IR; don't create it. by Dale Johannesen · 15 years ago
  5. 90b0364 fix some typos by Chris Lattner · 15 years ago
  6. f1b4eaf rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 15 years ago
  7. 025cc6e Cosmetic changes. by Dale Johannesen · 15 years ago
  8. d727343 Fix a DAGCombiner crash when folding binary vector operations with constant by Bob Wilson · 15 years ago
  9. f5daf8b Add a transform to DAG Combiner. This improves the by Dale Johannesen · 15 years ago
  10. 33e77d3 take care of some todos, transforming [us]mul_lohi into by Chris Lattner · 15 years ago
  11. 1a0fbe2 when transforming a MULHS into a wider MUL, there is no need to SRA the by Chris Lattner · 15 years ago
  12. de1c360 Add a couple dag combines to transform mulhi/mullo into a wider multiply by Chris Lattner · 15 years ago
  13. 503a64d 80-col fixups. by Eric Christopher · 15 years ago
  14. 40f8f62 PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and by Jay Foad · 15 years ago
  15. bebfbc5 Fix a comment typo. by Bob Wilson · 15 years ago
  16. bf17cfa Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. by Wesley Peck · 15 years ago
  17. b9064bb Fix thinko: we must turn select(anyext, sext) into sext(select) by Duncan Sands · 15 years ago
  18. dcfd3a7 The DAGCombiner was threading select over pairs of extending loads even by Duncan Sands · 15 years ago
  19. 6a559cd Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl by Dan Gohman · 15 years ago
  20. d81f17a Just return undef for invalid masks or elts, and since we're doing that, by Eric Christopher · 15 years ago
  21. caebdd4 If we have an undef mask our Elt will be -1 for our access, handle by Eric Christopher · 15 years ago
  22. 394d629 Fix DAGCombiner to avoid going into an infinite loop when it by Dan Gohman · 15 years ago
  23. 4645509 Remove DAG combiner patch to fold vector splats. Instcombiner does it now. by Bob Wilson · 15 years ago
  24. 0f1db1a Teach the DAG combiner to fold a splat of a splat. Radar 8597790. by Bob Wilson · 15 years ago
  25. f96e4bd Make CodeGen TBAA-aware. by Dan Gohman · 15 years ago
  26. 2a135ae This DAG combine BRCOND transformation can look pass truncate of the operand: by Evan Cheng · 15 years ago
  27. 2831a19 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350 by Chris Lattner · 15 years ago
  28. ed1088a A select between a constant and zero, when fed by a bit test, can be efficiently by Owen Anderson · 15 years ago
  29. bc146b0 Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using by Owen Anderson · 15 years ago
  30. 6229d0a update a bunch of code to use the MachinePointerInfo version of getStore. by Chris Lattner · 15 years ago
  31. da2d8e1 eliminate an old SelectionDAG::getTruncStore method, propagating by Chris Lattner · 15 years ago
  32. 3d6ccfb propagate MachinePointerInfo through various uses of the old by Chris Lattner · 15 years ago
  33. fa45901 convert dagcombine off the old form of getLoad. This fixes several bugs by Chris Lattner · 15 years ago
  34. f165806 simplify DAGCombiner::SimplifySelectOps step #2/2. by Chris Lattner · 15 years ago
  35. 1806161 substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. by Chris Lattner · 15 years ago
  36. 85ca106 a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not by Chris Lattner · 15 years ago
  37. 4a9f150 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, by Owen Anderson · 15 years ago
  38. 0dcc814 Revert r114312 while I sort out some issues. by Owen Anderson · 15 years ago
  39. d910fb2 Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, by Owen Anderson · 15 years ago
  40. 24bde5b Don't narrow the load and store in a load+twiddle+store sequence unless by Dan Gohman · 15 years ago
  41. e0efc21 Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself by Nate Begeman · 15 years ago
  42. 54026c0 Remove r108639 now that it is handled by InstCombine instead. by Owen Anderson · 15 years ago
  43. 3ecdfaf Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions. by Owen Anderson · 15 years ago
  44. 3472766 Convert some tab stops into spaces. by Duncan Sands · 15 years ago
  45. f1d93ca Reenable DAG combining for vector shuffles. It looks like it was temporarily by Bob Wilson · 15 years ago
  46. cde5110 Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms. by Benjamin Kramer · 15 years ago
  47. bcc8017 Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake. by Evan Cheng · 15 years ago
  48. 0d881da Propagate debug loc. by Devang Patel · 15 years ago
  49. 8674949 Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they by Bob Wilson · 15 years ago
  50. b447c4e Remove variables which are assigned to but for which the value by Duncan Sands · 15 years ago
  51. 4e39e9d Reapply r106634, now that the bug it exposed is fixed. by Dan Gohman · 15 years ago
  52. cbe762b Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. by Daniel Dunbar · 15 years ago
  53. 9a52649 Some targets don't require the fencing MEMBARRIER instructions surrounding by Jim Grosbach · 15 years ago
  54. 8a7f742 Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, by Dan Gohman · 15 years ago
  55. 86234c3 Fix another variant of PR 7191. Also add a testcase by Dale Johannesen · 15 years ago
  56. 61734eb Fix PR 7191. I have been unable to create a .ll file that fails, sorry. by Dale Johannesen · 15 years ago
  57. 70fe664 Clean up extra whitespace. by Bob Wilson · 15 years ago
  58. 78f006a Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements by Bob Wilson · 15 years ago
  59. 492fd45 Optimize away insertelement of an undef value. This shows up in by Bob Wilson · 15 years ago
  60. 0a942db Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. by Evan Cheng · 15 years ago
  61. 28dad2a Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 by Evan Cheng · 15 years ago
  62. a083988 FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). by Evan Cheng · 15 years ago
  63. aad753b Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869. by Evan Cheng · 15 years ago
  64. 3ce89f4 Apply a patch from Jan Sjodin to fix a compiler abort on vector by Dan Gohman · 15 years ago
  65. b3a3d5e Try operation promotion only if regular dag combine and target-specific ones failed to do anything. by Evan Cheng · 15 years ago
  66. ac7eae5 - When legal, promote a load to zextload rather than ext load. by Evan Cheng · 15 years ago
  67. 95c57ea When a load operand is promoted to an extload, replace other uses with uses of extload result truncated. by Evan Cheng · 15 years ago
  68. a7bcef1 Apply a fix for a vector setcc dagcombine from Jan Sjodin. No by Dan Gohman · 15 years ago
  69. caf7740 Code refactoring. by Evan Cheng · 15 years ago
  70. 07c4e10 - It's not safe to promote rotates (at least not trivially). by Evan Cheng · 15 years ago
  71. 86c5abb The visitXOR method can return the same SDNode. If so, we don't want to delete by Bill Wendling · 15 years ago
  72. 4c26e93 More progress on promoting i16 operations to i32 for x86. Work in progress. by Evan Cheng · 15 years ago
  73. e5b51ac More work to allow dag combiner to promote 16-bit ops to 32-bit. by Evan Cheng · 15 years ago
  74. 003d7c4 (i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case until -promote-16bit is enabled. by Evan Cheng · 15 years ago
  75. 64b7bf7 Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding. by Evan Cheng · 15 years ago
  76. e698758 enhance the load/store narrowing optimization to handle a by Chris Lattner · 15 years ago
  77. 6dc8685 teach codegen to turn trunc(zextload) into load when possible. by Chris Lattner · 15 years ago
  78. efcddc3 add a simple dag combine to replace trivial shl+lshr with by Chris Lattner · 15 years ago
  79. 2392ae7 Implement rdar://7860110 (also in target/readme.txt) narrowing by Chris Lattner · 15 years ago
  80. 46510a7 Add const qualifiers to CodeGen's use of LLVM IR constructs. by Dan Gohman · 15 years ago
  81. 58c2587 Remove unnecessary parens. by Dan Gohman · 15 years ago
  82. d0e88f3 Fix -Wsign-compare warning (issued by clang++). by Ted Kremenek · 15 years ago
  83. 7f893c0 fix 80 col violation, patch by Alastair Lynn by Chris Lattner · 15 years ago
  84. 255f20f Fix sdisel memcpy, memset, memmove lowering: by Evan Cheng · 15 years ago
  85. f2f64e9 fix PR6533 by updating the br(xor) code to remember the case by Chris Lattner · 15 years ago
  86. 8f78e3c Fix another bitwidth calculation to handle vector types; based on a by Dan Gohman · 15 years ago
  87. 6900a39 Fix more code to work properly with vector operands. Based on by Dan Gohman · 15 years ago
  88. 32f9eb2 Use APInt instead of zext value. by Bill Wendling · 15 years ago
  89. 7d9f2b9 This test case: by Bill Wendling · 15 years ago
  90. 5b870af Fix several places to handle vector operands properly. by Dan Gohman · 15 years ago
  91. 2c755ba Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap. by Evan Cheng · 15 years ago
  92. cfe30ef Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in by Daniel Dunbar · 15 years ago
  93. 97e6b83 Re-apply 96540 and 96556 with fixes. by Evan Cheng · 15 years ago
  94. 3eba667 Revert commits 96556 and 96640, because commit 96556 breaks the by Duncan Sands · 15 years ago
  95. 89bb7b5 Some dag combiner goodness: by Evan Cheng · 15 years ago
  96. 1e55944 by David Greene · 15 years ago
  97. f451cb8 Fix "the the" and similar typos. by Dan Gohman · 15 years ago
  98. 87c46d8 Improve EXTRACT_VECTOR_ELT patch based on comments from Duncan by Mon P Wang · 16 years ago
  99. c6654ec4 Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result by Mon P Wang · 16 years ago
  100. 8c7ecaf Implement cond ? -1 : 0 with sbb. by Evan Cheng · 16 years ago