- 7f96f39 More ppc32 byval handling (bug fixes). Things are looking pretty good now. by Dale Johannesen · 17 years ago
- 27b7db5 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. by Evan Cheng · 17 years ago
- a2fcff4 Add support for calls with i128 return values on ppc64. by Dan Gohman · 17 years ago
- 5f5bf3a PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this by Bill Wendling · 17 years ago
- 9ed06db Add support for lowering 128-bit shifts on ppc64. by Dan Gohman · 17 years ago
- 8419dd6 Next bits of PPC byval handling. Basically functional but there are bugs. by Dale Johannesen · 17 years ago
- 1f797a3 Next bit of PPC ByVal handling; call-site code seems correct now. by Dale Johannesen · 17 years ago
- 5b3b695 Move PPC lowering functions into PPCTargetLowering by Dale Johannesen · 17 years ago
- 28d08fd Interface of getByValTypeAlignment differed between by Dale Johannesen · 17 years ago
- ec59b95 Don't hard-code the mask size to be 32, which is incorrect on ppc64 by Dan Gohman · 17 years ago
- b3564aa Convert the last remaining users of the non-APInt form of by Dan Gohman · 17 years ago
- d497d9f I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. by Andrew Lenharth · 17 years ago
- e179584 Change how FP immediates are handled. by Nate Begeman · 18 years ago
- 977a76f Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits by Dan Gohman · 18 years ago
- 9f72d1a don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. by Chris Lattner · 18 years ago
- fd29e0e Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. by Dan Gohman · 18 years ago
- 3069b87 Follow Chris' suggestion; change the PseudoSourceValue accessors by Dan Gohman · 18 years ago
- 69de193 Re-apply the memory operand changes, with a fix for the static by Dan Gohman · 18 years ago
- fcf5d4f Unbreak ppc debug support. by Evan Cheng · 18 years ago
- 334dc1f Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. by Evan Cheng · 18 years ago
- 1a02486 Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting by Dan Gohman · 18 years ago
- c6c391d Create a new class, MemOperand, for describing memory references by Dan Gohman · 18 years ago
- ff9b373 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert by Evan Cheng · 18 years ago
- b625f2f Factor the addressing mode and the load/store VT out of LoadSDNode by Dan Gohman · 18 years ago
- f9c98e6 The last pieces needed for loading arbitrary by Duncan Sands · 18 years ago
- 5c5eb80 Implement flt_rounds for PowerPC. by Dale Johannesen · 18 years ago
- ef97c67 get symbolic information for ppc ldbl nodes. by Chris Lattner · 18 years ago
- a7a02fb Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to: by Chris Lattner · 18 years ago
- ddf8956 This commit changes: by Chris Lattner · 18 years ago
- 0bd4893 * Introduce a new SelectionDAG::getIntPtrConstant method by Chris Lattner · 18 years ago
- 007f984 Output sinl for a long double FSIN node, not sin. by Duncan Sands · 18 years ago
- 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 5a6c91a Fix unintented change from last commit by Nicolas Geoffray · 18 years ago
- 616585b Enable EH for linux/ppc32 targets by Nicolas Geoffray · 18 years ago
- 3fc027d implement __builtin_return_addr(0) on ppc. by Chris Lattner · 18 years ago
- 1f87300 Implement ExpandOperationResult for ppc i64 fp->int, which fixes by Chris Lattner · 18 years ago
- 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 18 years ago
- 7921706 Disable a couple more things for ppcf128. by Dale Johannesen · 18 years ago
- 3311876 Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. by Evan Cheng · 18 years ago
- 26cb286 comment fixes by Chris Lattner · 18 years ago
- fabd32d More ppcf128 issues (maybe the last)? by Dale Johannesen · 18 years ago
- 1de7c1d Change LowerFP_TO_SINT to create the specific code it needs instead of by Chris Lattner · 18 years ago
- 296c176 Fix type mismatch error in PPC Altivec (only causes by Dale Johannesen · 18 years ago
- a3f269f Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. by Dan Gohman · 18 years ago
- f96e4de Set ISD::FPOW to Expand. by Dan Gohman · 18 years ago
- 6eaeff2 Next PPC long double bits: ppcf128->i32 conversion. by Dale Johannesen · 18 years ago
- 3ce990d When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in by Dan Gohman · 18 years ago
- 638ccd5 Next powerpc long double bits. Comparisons work, by Dale Johannesen · 18 years ago
- 161e897 First round of ppc long double. call/return and by Dale Johannesen · 18 years ago
- f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 18 years ago
- 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
- eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 18 years ago
- b8a80f0 Use i64 on a PPC64 machine by Bill Wendling · 18 years ago
- 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 18 years ago
- 66ffe6b Vector fneg must be expanded into fsub -0.0, X. by Evan Cheng · 18 years ago
- 36397f5 Support for trampolines, except for X86 codegen which is still under discussion. by Duncan Sands · 18 years ago
- 75ce010 Assert when TLS is not implemented. by Lauro Ramos Venancio · 18 years ago
- 532dc2e Change getCopyToParts and getCopyFromParts to always use target-endian by Dan Gohman · 18 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
- 3ee7740 describe an argument, hide it. by Chris Lattner · 18 years ago
- 52387be If a function is vararg, never pass inreg arguments in registers. Thanks to by Chris Lattner · 18 years ago
- 51eaa86 Rename MVT::getVectorBaseType to MVT::getVectorElementType. by Dan Gohman · 18 years ago
- f5135be Apply this patch: by Dan Gohman · 18 years ago
- 9f5d578 fix some subtle inline asm selection issues by Chris Lattner · 18 years ago
- 7c7ba9d Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 by Chris Lattner · 18 years ago
- 0111999 Starting implementation of the ELF32 ABI specification of varargs handling. by Nicolas Geoffray · 18 years ago
- ec58d9f The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules by Nicolas Geoffray · 18 years ago
- ef3c030 The ELF ABI specifies F1-F8 registers as argument registers for double, not by Nicolas Geoffray · 18 years ago
- c9addb7 implement the new addressing mode description hook. by Chris Lattner · 18 years ago
- 1baa197 "The C standards do say that "char" may either be a "signed char" or "unsigned by Lauro Ramos Venancio · 18 years ago
- 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 18 years ago
- b2ec1cc Stack and register alignment of call arguments in the ELF ABI by Nicolas Geoffray · 18 years ago
- 8619391 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
- b9a7bea Switch PPC return lower to use an autogenerated CC description. by Chris Lattner · 18 years ago
- 43c6e7c Implemented the frameaddress intrinsic for PPC. by Nicolas Geoffray · 18 years ago
- 63f8fb1 Differentiate between the MachO and the ELF ABI the CALL instruction. by Nicolas Geoffray · 18 years ago
- caddd44 always lower to RETFLAG, never leave it as just ret. by Chris Lattner · 18 years ago
- 4ddf7a4 no really, this is the right patch by Chris Lattner · 18 years ago
- 640c0ac always promote float varargs to double. by Chris Lattner · 18 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 18 years ago
- 2ad9f17 Simplify lowering and selection of exception ops. by Jim Laskey · 18 years ago
- 62819f3 Support to provide exception and selector registers. by Jim Laskey · 18 years ago
- dee5a5a Fix ixaddrs as well, allowing ppc64 to compile to: by Chris Lattner · 18 years ago
- bc681d6 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: by Chris Lattner · 18 years ago
- bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 19 years ago
- b10308e Propagate changes from my local tree. This patch includes: by Anton Korobeynikov · 19 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 19 years ago
- d08d233 setSetCCIsExpensive is gone. by Evan Cheng · 19 years ago
- ca367b4 Provide support for FP_TO_UINT. by Jim Laskey · 19 years ago
- 57fc62c Another step forward in PPC64 JIT support: we now no-longer need stubs by Chris Lattner · 19 years ago
- 2060a82 Missing opcode. by Jim Laskey · 19 years ago
- d27a258 Cleaned setjmp/longjmp lowering interfaces. Now we're producing right by Anton Korobeynikov · 19 years ago
- 85c671b Fix i64 uint_to_fp on ppc64 by Chris Lattner · 19 years ago
- efc7e52 Restoration of the stack pointer after a deallocation of a alloca was not by Jim Laskey · 19 years ago
- fbb74e6 1. In ppc64 mode we need only use one GPR. by Jim Laskey · 19 years ago
- 70fa493 Fix the CodeGen/PowerPC/vec_constants.ll regression. by Chris Lattner · 19 years ago
- 15eb329 Fix bug codegen'ing FP constant vectors with integer splats. Make sure the by Chris Lattner · 19 years ago
- 619965d Offset for load of 32-bit arg in 64-bit world was incorrect. by Jim Laskey · 19 years ago
- 7fc4a94 Remove debug code. by Jim Laskey · 19 years ago