- 8019aac Merge with upstream LLVM @152063 by Stephen Hines · 12 years ago
- c02a5c5 Merge branch 'upstream' into merge-20120305 by Stephen Hines · 12 years ago
- c3384c9 ARM Refactor VLD/VST spaced pair instructions. by Jim Grosbach · 12 years ago
- af9f4bc ARM Remove a bit of dead code. by Jim Grosbach · 12 years ago
- 28f08c9 ARM refactor away a bunch of VLD/VST pseudo instructions. by Jim Grosbach · 12 years ago
- c6449b6 Make MCRegisterInfo available to the the MCInstPrinter. by Jim Grosbach · 12 years ago
- c8d7eea Address Evan's comments for r151877. by Chad Rosier · 12 years ago
- 74bebde updated patch for the ARM fused multiply add/sub by Sebastian Pop · 12 years ago
- 9ebfbf8 Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. by Craig Topper · 12 years ago
- ec93b6d Make aliases for shld and shrd match gas. PR12173. by Eli Friedman · 12 years ago
- fce711c Use <def,undef> operands when spilling NEON bundles. by Jakob Stoklund Olesen · 12 years ago
- e4fd907 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 12 years ago
- b6632ba Use uint16_t instead of unsigned to store registers in reg classes. Reduces static data size. by Craig Topper · 12 years ago
- 015f228 Use uint16_t to store registers in callee saved register tables to reduce size of static data. by Craig Topper · 12 years ago
- 991271d Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o by Craig Topper · 12 years ago
- 74bab7f Prevent obscure and incorrect tail-call optimization. by Chad Rosier · 12 years ago
- fc501a3 Neuter the optimization I implemented with r107852 and r108258 which turn some by Evan Cheng · 12 years ago
- b24b820 Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister(). by Jakob Stoklund Olesen · 12 years ago
- e751c00 ARM use the right opcode for FP<->Integer move in fast-isel. by Jim Grosbach · 12 years ago
- 647c0ce Minimal changes for LLVM to compile under VS11. by Michael J. Spencer · 12 years ago
- b2930b9 Changes for migrating to using register mask operands. by Akira Hatanaka · 12 years ago
- b057851 Change ARMInstPrinter::printPredicateOperand() so it will not abort if it by Kevin Enderby · 12 years ago
- dfa27ae Fix bugs which were introduced when support for base+index floating point loads by Akira Hatanaka · 12 years ago
- ccc8d3b Make TargetRegisterClasses non-virtual by making the only virtual function a function pointer. by Benjamin Kramer · 12 years ago
- 36a2138 Emit the "is an intrinsic overloaded" table as a bitfield. by Benjamin Kramer · 12 years ago
- e9e520f Pass endian information to constructors. Define separate functions to create by Akira Hatanaka · 12 years ago
- 8bee081 Added annotations for x86 pc relative loads to llvm's 'C' disassembler. by Kevin Enderby · 12 years ago
- 9fd58f0 Intel Atom instruction itineraries for mov sign extension and mov zero extension. by Andrew Trick · 12 years ago
- adef06a Make MemoryObject accessor members const again by Derek Schuff · 12 years ago
- c01810e ARM implement TargetInstrInfo::getNoopForMachoTarget() by Jim Grosbach · 12 years ago
- c94206e ARM vbit/vbif/vbsl assembly optional size suffix. by Jim Grosbach · 12 years ago
- 4bfcd4a Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call. by Evan Cheng · 12 years ago
- 21a1401 Properly MCize the section switch, removing a FIXME. by Roman Divacky · 12 years ago
- 20bd529 Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part. by Daniel Dunbar · 12 years ago
- bb481f8 remove blanks, and some code format by Jia Liu · 12 years ago
- ec52aaa Some ARM implementaions, e.g. A-series, does return stack prediction. That is, by Evan Cheng · 12 years ago
- 980a999 Add comments. by Akira Hatanaka · 12 years ago
- b75673b Do not reserve $gp as a dedicated global base register if the target ABI is not O32. by Akira Hatanaka · 12 years ago
- 44b6c71 Add support for floating point base register + offset register addressing mode by Akira Hatanaka · 12 years ago
- 0f9d07f Enable ARM base pointer when calling functions with large arguments. by Jakob Stoklund Olesen · 12 years ago
- e879cba by Preston Gurd · 12 years ago
- 0cae72c Delete incorrect reference to inexistent Hexagon architecture manuals. by Evandro Menezes · 12 years ago
- 7b25ecf ARM BL/BLX instruction fixups should use relocations. by Jim Grosbach · 12 years ago
- 4328f9f Reapply r151278 with fixes. by Roman Divacky · 12 years ago
- 77834e7 Add q suffix aliases for the fistp and fisttp mnemonics. rdar://10921670 PR11935 by Chad Rosier · 12 years ago
- 3d14b9e Remove unnecessary template parameters. by Akira Hatanaka · 12 years ago
- b90113a Fix instruction predicates that were not set correctly. by Akira Hatanaka · 12 years ago
- 0943303 Fix the symbolic operand added for the C disassmbler API for the ARM bl by Kevin Enderby · 12 years ago
- a89cc7f Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen. by Craig Topper · 12 years ago
- c4a238c delete useless comment&blank by Jia Liu · 12 years ago
- 930a1eb X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. by Craig Topper · 12 years ago
- 3467474 Default TargetData alignment information for 128-bit floating-point types. by Hal Finkel · 12 years ago
- 9b4d708 Revert r151278, breaks static linking. by Hal Finkel · 12 years ago
- 9a68fdc Target/X86: Fix assertion failures and warnings caused by r151382 _ftol2 lowering for i386-*-win32 targets. Patch by Joe Groff. by NAKAMURA Takumi · 12 years ago
- e4ea241 Add definitions of floating point multiply add/sub and negative multiply by Akira Hatanaka · 12 years ago
- 648f00c Add an option to use a virtual register as the global base register instead of by Akira Hatanaka · 12 years ago
- 120cfdf Remove unused cl::opt, make another opt static. by Benjamin Kramer · 12 years ago
- 9e931f6 Thumb2 asm aliases for wide bitwise w/ immediate instructions. by Jim Grosbach · 12 years ago
- 1a2d061 Add WIN_FTOL_* psudo-instructions to model the unique calling convention by Michael J. Spencer · 12 years ago
- 3161039 X11/X2 loads around indirect calls on ppc64 should not be deleted. by Hal Finkel · 12 years ago
- 1941110 Remove dead code. by Richard Osborne · 12 years ago
- d18134f Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics by Pete Cooper · 12 years ago
- 8060356 comment fix by Jia Liu · 12 years ago
- c2e2dcd some comment fix by Jia Liu · 12 years ago
- 4df4f5b comment fix by Jia Liu · 12 years ago
- fc77014 replace a balnk with - by Jia Liu · 12 years ago
- 1711cdf 80 columns of Mips InstPrinter Makefile by Jia Liu · 12 years ago
- c54f634 Switch ARM target to register masks. by Jakob Stoklund Olesen · 12 years ago
- d1b220a Make sure the regs are low regs for tMUL size reduction. by Jim Grosbach · 12 years ago
- fdf7c85 Thumb2 size reduction fix for tied operands of tMUL. by Jim Grosbach · 12 years ago
- db95389 When emitting a cmp with 0 for a lowered select, mask out the high by Dan Gohman · 12 years ago
- ca0af3a MCize function entry label emission on PowerPC64 properly. by Roman Divacky · 12 years ago
- b80d571 Updated the llvm-mc disassembler C API to support for the X86 target. by Kevin Enderby · 12 years ago
- 1854722 Fix the numbering of some of the registers and reclassify a couple of them. by Brendon Cahoon · 12 years ago
- 1b14f20 Remove unused variable. by Duncan Sands · 12 years ago
- 5fb468a Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits by Evan Cheng · 12 years ago
- c892aeb Optimize a couple of common patterns involving conditional moves where the false by Evan Cheng · 12 years ago
- d55a266 Allow the use of an alternate symbol for calculating a function's size. by Hal Finkel · 12 years ago
- c9c137b Properly emit _fltused with FastISel. Refactor to share code with SDAG. by Michael J. Spencer · 12 years ago
- 90f2004 Remove extra semi-colons. by Chad Rosier · 12 years ago
- dfb4fe2 Efficient pattern for store truncate. Patch by Evandro Menezes. by Sirish Pande · 12 years ago
- c528e46 Declare register classes as const. Fix a couple pointers to register classes that weren't already const. by Craig Topper · 12 years ago
- 44d2382 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. by Craig Topper · 12 years ago
- 57708ab Adding support for Microsoft's thiscall calling convention. LLVM side of the patch. by Aaron Ballman · 12 years ago
- 209600b Clarify ARM calling conventions. by Jakob Stoklund Olesen · 12 years ago
- 5990bd7 Use a function in MathExtras to do sign extension. by Akira Hatanaka · 12 years ago
- a1aa8db Calls don't really change the stack pointer. by Jakob Stoklund Olesen · 12 years ago
- 0704327 Proper support for a bastardized darwin-eabi hybird ABI. by Evan Cheng · 12 years ago
- 19273ae Clear virtual registers after they are no longer referenced. by Andrew Trick · 12 years ago
- 873fd5f Improve generated code for extending loads and some trunc stores on ARM. by James Molloy · 12 years ago
- b0934ab Remove dead code. Improve llvm_unreachable text. Simplify some control flow. by Ahmed Charles · 12 years ago
- 1bf724b Remove some unneeded includes and fix ordering in X86ISelLowering.cpp. Remove unneeded 'using namespace'. by Craig Topper · 12 years ago
- dd637ae Unify all shuffle mask checking functions take a mask and VT instead of VectorShuffleSDNode. by Craig Topper · 12 years ago
- 5aaffa8 Make a bunch of X86ISelLowering shuffle functions static now that they are no longer needed by isel. by Craig Topper · 12 years ago
- 9ad012a comment fix ARM.h by Jia Liu · 12 years ago
- 44de83a some comment fix for X86 and ARM by Jia Liu · 12 years ago
- 28a713b Add vmfunc instruction to X86 assembler and disassembler. by Craig Topper · 12 years ago
- 31d157a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. by Jia Liu · 12 years ago
- a771330 Add X86InstrSVM.td that I forgot to add in r150873. by Craig Topper · 12 years ago
- 9e3d0b3 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. by Craig Topper · 12 years ago