1. 48b61a7 Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. by Chris Lattner · 19 years ago
  2. f15485a SelectionDAGISel can now natively handle Switch instructions, in the same by Nate Begeman · 19 years ago
  3. 6d92cad Codegen vector predicate compares. by Chris Lattner · 19 years ago
  4. 5b6a01b Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead by Evan Cheng · 19 years ago
  5. 8d052bc Add some basic patterns for other datatypes by Chris Lattner · 19 years ago
  6. 9c61dcf Codegen things like: by Chris Lattner · 19 years ago
  7. 7fbcef7 Disable the i32->float G5 optimization. It is unsafe, as documented in the by Chris Lattner · 19 years ago
  8. 64b3a08 add support for using vxor to build zero vectors. This implements by Chris Lattner · 19 years ago
  9. ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 19 years ago
  10. 9b3bd46 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. by Chris Lattner · 19 years ago
  11. 23baa1b remove dead variable by Chris Lattner · 19 years ago
  12. bd83afd Fix a couple of bugs in permute/splat generate, thanks to Nate for actually by Chris Lattner · 19 years ago
  13. dd4d2d0 Add support for generating vspltw, instead of a vperm instruction with a by Chris Lattner · 19 years ago
  14. 88a99ef Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. by Chris Lattner · 19 years ago
  15. ef819f8 fix duplicate definition errors by Chris Lattner · 19 years ago
  16. f1d0b2b Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. by Chris Lattner · 19 years ago
  17. b2177b9 Custom lower SCALAR_TO_VECTOR into lve*x. by Chris Lattner · 19 years ago
  18. ab515b0 PPC doesn't have SCALAR_TO_VECTOR by Chris Lattner · 19 years ago
  19. a064d28 rename these nodes by Chris Lattner · 19 years ago
  20. 81e8097 Remove BRTWOWAY* by Nate Begeman · 19 years ago
  21. c4c6257 Added getTargetLowering() to TargetMachine. Refactored targets to support this. by Evan Cheng · 19 years ago
  22. 9601a86 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should by Chris Lattner · 19 years ago
  23. 5126984 Compile this: by Chris Lattner · 19 years ago
  24. 8c13d0a Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. by Chris Lattner · 19 years ago
  25. d30bf01 Vector op lowering. by Evan Cheng · 19 years ago
  26. 4c1aa86 - Added option -relocation-model to set relocation model. Valid values include static, pic, by Evan Cheng · 19 years ago
  27. 1efa40f split register class handling from explicit physreg handling. by Chris Lattner · 19 years ago
  28. 4217ca8dc Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
  29. d2ee218 Moved PICEnabled to include/llvm/Target/TargetOptions.h by Evan Cheng · 19 years ago
  30. 45b3976 Switch to using getCALLSEQ_START instead of using our own creation calls by Chris Lattner · 20 years ago
  31. ad3bc8d Implement getConstraintType for PPC. by Chris Lattner · 20 years ago
  32. 763317d Add the simple PPC integer constraints by Chris Lattner · 20 years ago
  33. 750ac1b Fix some of the stuff in the PPC README file, and clean up legalization by Nate Begeman · 20 years ago
  34. b8973bd Allow the specification of explicit alignments for constant pool entries. by Evan Cheng · 20 years ago
  35. ddc787d add info about the inline asm register constraints for PPC by Chris Lattner · 20 years ago
  36. 4477590 Codegen by Nate Begeman · 20 years ago
  37. 37dd6f1 Functions that are lazily streamed in from the .bc file are *not* external. by Chris Lattner · 20 years ago
  38. d9b55dd Now that OpActions is big enough, we can specify actions for vector types by Chris Lattner · 20 years ago
  39. 3fd327f disable this for now by Chris Lattner · 20 years ago
  40. ec4a0c7 Request expansion of ConstantVec nodes. by Chris Lattner · 20 years ago
  41. a54aa94 Targets all now request ConstantFP to be legalized into TargetConstantFP. by Chris Lattner · 20 years ago
  42. e00ebf0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to by Chris Lattner · 20 years ago
  43. 281b55e Use PPCISD::CALL instead of ISD::CALL by Chris Lattner · 20 years ago
  44. bba534d Make llvm.frame/returnaddr not crash on ppc by Chris Lattner · 20 years ago
  45. ee62557 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for by Nate Begeman · 20 years ago
  46. 0577a22 Set SchedulingForLatency to be the default scheduling preference for all. by Evan Cheng · 20 years ago
  47. acc398c First part of bug 680: by Nate Begeman · 20 years ago
  48. 7558b0e Default scheduling preference is SchedulingForLatency. by Evan Cheng · 20 years ago
  49. bc38dbf Don't assert on 'select_cc SETUO' by Chris Lattner · 20 years ago
  50. b22c08b Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code. by Chris Lattner · 20 years ago
  51. d88fc03 bswap implementation by Nate Begeman · 20 years ago
  52. cadd742 implement stacksave/stackrestore on PPC by Chris Lattner · 20 years ago
  53. b99329e expand unsupported stacksave/stackrestore nodes by Chris Lattner · 20 years ago
  54. 35ef913 Add bswap, rotl, and rotr nodes by Nate Begeman · 20 years ago
  55. a243db8 Fix calls that need to store values in stack slots, to not copy the stack by Chris Lattner · 20 years ago
  56. 413b979 Dead FP arguments still use an incoming FP reg. This fixes by Chris Lattner · 20 years ago
  57. da6d20f Give PPCISD:: nodes legible names in dumps. by Chris Lattner · 20 years ago
  58. a35ef63 linkonce symbols have an extra indirection, just like weak ones do. This fixes by Chris Lattner · 20 years ago
  59. e0bce71 Had expand logic backward. by Jim Laskey · 20 years ago
  60. abf6d17 Added initial support for DEBUG_LABEL allowing debug specific labels to be by Jim Laskey · 20 years ago
  61. 1166bf3 Remove a fixme by Nate Begeman · 20 years ago
  62. 50fb3c4 Fix one of the things in the todo file, and get a bit closer to folding by Nate Begeman · 20 years ago
  63. 53e8845 make sure bit_converts are expanded by Chris Lattner · 20 years ago
  64. 1b95e0b Simplify some code by using BIT_CONVERT by Chris Lattner · 20 years ago
  65. 9e4dd9d Pattern-match return. Includes gross hack! by Nate Begeman · 20 years ago
  66. 7fd1edd Convert load/store over to being pattern matched by Nate Begeman · 20 years ago
  67. 28a6b02 Add support for TargetConstantPool nodes to the dag isel emitter, and use by Nate Begeman · 20 years ago
  68. 4172b10 Use new PPC-specific nodes to represent shifts which require the 6-bit by Chris Lattner · 20 years ago
  69. 80720a9 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll by Chris Lattner · 20 years ago
  70. 425a969 Hook up one type, v4f32, to the VR RegisterClass for now. by Nate Begeman · 20 years ago
  71. f73bae1 No targets support line number info yet. by Chris Lattner · 20 years ago
  72. 1d05cb4 add an option to generate completely non-pic code, corresponding to what by Chris Lattner · 20 years ago
  73. 1df7478 Fix a bug that resistor on IRC hit where we tried to create token factor by Chris Lattner · 20 years ago
  74. 3eef4e3 Enable global address legalization, fixing a todo and allowing the removal by Chris Lattner · 20 years ago
  75. 1566613 Use the right accessor to create this node by Chris Lattner · 20 years ago
  76. 860e886 Add an initial hack at legalizing GlobalAddress into the appropriate nodes by Chris Lattner · 20 years ago
  77. 2823b3e When lowering direct calls, lower them to use a targetglobaladress directly by Chris Lattner · 20 years ago
  78. 85fd97d Fix an assert compiling MallocBench/gs by Chris Lattner · 20 years ago
  79. ae749a9 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the by Nate Begeman · 20 years ago
  80. eb255f2 Expose the fextend on the DAG instead of doing it in the matcher by Chris Lattner · 20 years ago
  81. 405e3ec Invert the TargetLowering flag that controls divide by consant expansion. by Nate Begeman · 20 years ago
  82. 6957523 Move the target constant divide optimization up into the dag combiner, so by Nate Begeman · 20 years ago
  83. 4a95945 Add the ability to lower return instructions to TargetLowering. This by Nate Begeman · 20 years ago
  84. 9d2b817 Do the right thing and enable 64 bit regs under the control of a subtarget by Nate Begeman · 20 years ago
  85. 1d9d742 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is by Nate Begeman · 20 years ago
  86. 21e463b More PPC32 -> PPC changes, as well as merging some classes that were by Nate Begeman · 20 years ago
  87. 16e71f2 Rename PPC32*.h to PPC*.h by Chris Lattner · 20 years ago
  88. 7c0d664 fix an f32/f64 type mismatch by Chris Lattner · 20 years ago
  89. 919c032 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. by Chris Lattner · 20 years ago
  90. 615c2d0 Add FP versions of the binary operators, keeping the int and fp worlds seperate. by Chris Lattner · 20 years ago
  91. d145a61 Darwin, like many BSD systems, has a setjmp/longjmp which saves the signal mask by Chris Lattner · 20 years ago
  92. 7b73834 Change the arg lowering code to use copyfromreg from vregs associated by Chris Lattner · 20 years ago
  93. 31262ce Remove some dead vectors by Chris Lattner · 20 years ago
  94. e6ec9f2 PowerPC cannot truncstore i1 natively by Chris Lattner · 20 years ago
  95. c09eeec Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we by Nate Begeman · 20 years ago
  96. 1e9de3e Decouple fsqrt from gpul optimizations, implementing fsqrt.ll. by Chris Lattner · 20 years ago
  97. f505949 Restore this patch now that the latent bug has been fixed by Chris Lattner · 20 years ago
  98. 5b3224f Revert the previous patch which causes a mysterious regression in toast. by Chris Lattner · 20 years ago
  99. 2a00daa Implement small-arguments.ll:test3 by teaching the DAG optimizer that by Chris Lattner · 20 years ago
  100. f760532 Move FCTIWZ handling out of the instruction selectors and into legalization, by Chris Lattner · 20 years ago