- 7dbf7d8 Add AVX 256-bit compare instructions and a bunch of testcases by Bruno Cardoso Lopes · 14 years ago
- 87a85c7 AVX 256-bit conversion instructions by Bruno Cardoso Lopes · 14 years ago
- 37a746b my work on adding segment registers to LEA missed the by Chris Lattner · 14 years ago
- fd920fa Add AVX 256-bit packed logical forms by Bruno Cardoso Lopes · 14 years ago
- 6991623 Add AVX 256-bit unop arithmetic instructions by Bruno Cardoso Lopes · 14 years ago
- a0d09a8 Add AVX 256 binary arithmetic instructions by Bruno Cardoso Lopes · 14 years ago
- aa099be Add AVX 256-bit MOVMSK forms by Bruno Cardoso Lopes · 14 years ago
- b6c3a60 MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser. by Daniel Dunbar · 14 years ago
- 492b7a2 MC/AsmParser: Move .desc parsing to Darwin specific parser. by Daniel Dunbar · 14 years ago
- 9ac66b0 MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser. by Daniel Dunbar · 14 years ago
- d52e78e Add AVX 256-bit packed MOVNT variants by Bruno Cardoso Lopes · 14 years ago
- 2bfb8f6 Add AVX 256-bit unpack and interleave by Bruno Cardoso Lopes · 14 years ago
- e86b01c Start the support for AVX instructions with 256-bit %ymm registers. A couple of by Bruno Cardoso Lopes · 14 years ago
- 834df19 Rework segment prefix emission code to handle segments by Chris Lattner · 14 years ago
- 9fc0522 Implement the major chunk of PR7195: support for 'callw' by Chris Lattner · 14 years ago
- cc69e13 Add more assembly opcodes for SSE compare instructions by Bruno Cardoso Lopes · 14 years ago
- ced9ec9 Add AVX AES instructions by Bruno Cardoso Lopes · 14 years ago
- 4f6bdf9 Add AVX SSE4.2 instructions by Bruno Cardoso Lopes · 14 years ago
- 09df2ae Add AVX SSE4.1 insertps, ptest and movntdqa instructions by Bruno Cardoso Lopes · 14 years ago
- 3c14822 Add AVX SSE4.1 extractps and pinsr instructions by Bruno Cardoso Lopes · 14 years ago
- 4fd32db Add AVX SSE4.1 Extract Integer instructions by Bruno Cardoso Lopes · 14 years ago
- ee94e82 Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions by Bruno Cardoso Lopes · 14 years ago
- 36869b6 Add part of AVX SSE4.1 packed move with sign/zero extend instructions by Bruno Cardoso Lopes · 14 years ago
- 07de406 Add AVX vblendvpd, vblendvps and vpblendvb instructions by Bruno Cardoso Lopes · 14 years ago
- 68b559e Add AVX SSE4.1 blend, mpsadbw and vdp by Bruno Cardoso Lopes · 14 years ago
- 4a544be Add AVX SSE4.1 binop (some forms of packed max,min,mul,pack,cmp) instructions by Bruno Cardoso Lopes · 14 years ago
- c607570 Add AVX SSE4.1 Horizontal Minimum and Position instruction by Bruno Cardoso Lopes · 14 years ago
- 2c70d4a Add AVX SSE4.1 round instructions by Bruno Cardoso Lopes · 14 years ago
- f5cd8c5 - Add support for the rest of AVX SSE3 instructions by Bruno Cardoso Lopes · 14 years ago
- c6fcdeb Move SSE3 Move patterns to a more appropriate section by Bruno Cardoso Lopes · 14 years ago
- 7144821 Add AVX SSE3 packed addsub instructions by Bruno Cardoso Lopes · 14 years ago
- 79b634c Add AVX SSE3 replicate and convert instructions by Bruno Cardoso Lopes · 14 years ago
- 6596a62 by Bruno Cardoso Lopes · 14 years ago
- e26f14d Add AVX SSE2 mask creation and conditional store instructions by Bruno Cardoso Lopes · 14 years ago
- 1e4b723 Add AVX SSE2 packed integer extract/insert instructions by Bruno Cardoso Lopes · 14 years ago
- 876085d Add AVX SSE2 integer unpack instructions by Bruno Cardoso Lopes · 14 years ago
- d252fec Add AVX SSE2 packed integer shuffle instructions by Bruno Cardoso Lopes · 14 years ago
- 6d5d2b5 Add AVX SSE2 pack with saturation integer instructions by Bruno Cardoso Lopes · 14 years ago
- c0ea94a Add AVX SSE2 integer packed compare instructions by Bruno Cardoso Lopes · 14 years ago
- 5a3a476 - Add AVX form of all SSE2 logical instructions by Bruno Cardoso Lopes · 14 years ago
- 6c9fa43 Add *several* AVX integer packed binop instructions by Bruno Cardoso Lopes · 14 years ago
- 147b7ca by Bruno Cardoso Lopes · 14 years ago
- 721ef73 Add AVX non-temporal stores by Bruno Cardoso Lopes · 14 years ago
- ea86423 Add sqrt, rsqrt and rcp AVX instructions by Bruno Cardoso Lopes · 14 years ago
- 4548260 Described the missing AVX forms of SSE2 convert instructions by Bruno Cardoso Lopes · 14 years ago
- bdffc16 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions by Bruno Cardoso Lopes · 14 years ago
- 161476e Reapply r106896: Add several AVX MOV flavors Support VEX encoding for MRMDestReg by Bruno Cardoso Lopes · 14 years ago
- 95325b0 revert this now, it's using avx instead of sse :) by Bruno Cardoso Lopes · 14 years ago
- 544a95d Add several AVX MOV flavors Support VEX encoding for MRMDestReg by Bruno Cardoso Lopes · 14 years ago
- a0ae87f Add some AVX convert instructions by Bruno Cardoso Lopes · 14 years ago
- 7881843 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}. by Bruno Cardoso Lopes · 14 years ago
- 645b209 Teach the x86 mc assembler that %dr6 = %db6, this implements rdar://8013734 by Chris Lattner · 14 years ago
- 6539dc6 Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases by Bruno Cardoso Lopes · 14 years ago
- e93e300 Add AVX MOVMSK{PS,PD}rr instructions by Bruno Cardoso Lopes · 14 years ago
- 428256b Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction by Bruno Cardoso Lopes · 14 years ago
- 7dbfd07 Add AVX SHUF{PS,PD}{rr,rm} instructions by Bruno Cardoso Lopes · 14 years ago
- 50b9efc Add support for the x86 instructions "pusha" and "popa". by Nico Weber · 14 years ago
- 62a76c6 Add AVX compare packed instructions by Bruno Cardoso Lopes · 14 years ago
- 0caca39 Reapply support for AVX unpack and interleave instructions, with by Bruno Cardoso Lopes · 14 years ago
- c3d57b1 Add AVX MOV{SS,SD}{rr,rm} instructions by Bruno Cardoso Lopes · 14 years ago
- 97994e0 Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion by Eric Christopher · 14 years ago
- f4f4bad Refactor aliased packed logical instructions, also add by Bruno Cardoso Lopes · 14 years ago
- be4d595 Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions by Bruno Cardoso Lopes · 14 years ago
- 1cf44fc fix rdar://7873482 by teaching the instruction encoder to emit by Chris Lattner · 14 years ago
- d7f9cc4 Add {mix,max}{ss,sd}{rr,rm} AVX forms. by Bruno Cardoso Lopes · 14 years ago
- cf125d0 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm by Bruno Cardoso Lopes · 14 years ago
- 7be0d2c More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr Handle OpSize TSFlag for AVX by Bruno Cardoso Lopes · 14 years ago
- c902a59 More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) Introduce the VEX_X field by Bruno Cardoso Lopes · 14 years ago
- 99405df Reapply r105521, this time appending "LLU" to 64 bit by Bruno Cardoso Lopes · 14 years ago
- 1087f54 revert r105521, which is breaking the buildbots with stuff like this: by Chris Lattner · 14 years ago
- 3eca98b Initial AVX support for some instructions. No patterns matched by Bruno Cardoso Lopes · 14 years ago
- 31cc965 MC/X86: Add alias for movzx. by Kevin Enderby · 14 years ago
- 5e39442 MC/X86: Add alias for fwait. by Kevin Enderby · 14 years ago
- 31b6c5b Fix the use of x86 control and debug registers so that the assertion failure in by Kevin Enderby · 14 years ago
- bd65891 MC/X86: Add aliases for Jcc variants. by Kevin Enderby · 14 years ago
- bd3ba53 Add a quick test of relocations. by Eric Christopher · 14 years ago
- b106543 Fix the x86 move to/from segment register instructions. by Kevin Enderby · 14 years ago
- 02b46bc Add support for initialized global data for darwin tls. Update comments by Eric Christopher · 14 years ago
- cf50a53 Changed the encoding of X86 floating point stack operations where both operands by Kevin Enderby · 14 years ago
- 39e2dd7 MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. by Daniel Dunbar · 14 years ago
- 7937368 MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. by Daniel Dunbar · 14 years ago
- 04ac770 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required by Kevin Enderby · 14 years ago
- 7e2f5aa Make sure aeskeygenassist uses an unsigned immediate field. by Eric Christopher · 14 years ago
- e350690 Fix an mmx movd encoding. by Dan Gohman · 14 years ago
- ca956dc MC/X86: Add aliases for CMOVcc variants. by Kevin Enderby · 14 years ago
- 62e4c67 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example: by Daniel Dunbar · 14 years ago
- 4c36197 MC/X86: Add alias for setz, setnz, jz, jnz. by Daniel Dunbar · 14 years ago
- 9d31d79 Added retl for 32-bit x86 and added retq for 64-bit x86. by Kevin Enderby · 14 years ago
- 4e7f839 MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq. by Daniel Dunbar · 14 years ago
- e5e4ff9 Fix assembly parsing and encoding of the pushf and popf family of instructions. by Dan Gohman · 14 years ago
- 14aaeac Define the x86 pause instruction. by Dan Gohman · 14 years ago
- ee5673b Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it by Dan Gohman · 14 years ago
- a7f1354 fix rdar://7986634 - match instruction opcodes case insensitively. by Chris Lattner · 14 years ago
- 591466b A more combo tls testcase. by Eric Christopher · 14 years ago
- aa6c72e Few more simple tls testcases. by Eric Christopher · 14 years ago
- b4e876e Quick test to make sure we're emitting the tbss section correctly. by Eric Christopher · 14 years ago
- d8ba292 Fixed the problem with a branch to "0b" that was not parsed by llvm-mc by Kevin Enderby · 14 years ago
- 2ae4bfd MC/Mach-O: Implement support for setting indirect symbol table offset in section header. by Daniel Dunbar · 14 years ago
- ebe7fcd Added support in MC for Directional Local Labels. by Kevin Enderby · 14 years ago
- c6177a4 More data/parsing support for tls directives. Add a few more testcases by Eric Christopher · 14 years ago