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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 84423c8778ed22877c123fe41f5e137cb5a30e90 / test / MC
  1. f6a186e Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips. by Akira Hatanaka · 12 years ago
  2. 1386e9b Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. by Benjamin Kramer · 12 years ago
  3. 3e96531 Refactor data-in-code annotations. by Jim Grosbach · 12 years ago
  4. 59c15e9 Fixed a bug in llvm-objdump when disassembling using -macho option for a binary by Kevin Enderby · 12 years ago
  5. 0fd4f3c Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing by Kevin Enderby · 12 years ago
  6. e545c4e Add a test case for r156840, a fix to llvm-objdump when disassembling using by Kevin Enderby · 12 years ago
  7. 2ec304c Add support for the .rept directive. Patch by Vladmir Sorokin. I added support by Rafael Espindola · 12 years ago
  8. 6a80f9d ELF: Add support for the asm .version directive. by Benjamin Kramer · 12 years ago
  9. bc3b27c AsmParser: Add support for the .purgem directive. by Benjamin Kramer · 12 years ago
  10. e14a3c5 AsmParser: ignore the .extern directive. by Benjamin Kramer · 12 years ago
  11. dec06ef AsmParser: Add support for .ifc and .ifnc directives. by Benjamin Kramer · 12 years ago
  12. a3dd0eb AsmParser: Add support for .ifb and .ifnb directives. by Benjamin Kramer · 12 years ago
  13. 4147e4d Make the following changes in MipsAsmPrinter.cpp: by Akira Hatanaka · 12 years ago
  14. 27ba61d Insert instructions to the entry basic block which initializes the global by Akira Hatanaka · 12 years ago
  15. 169e9ba Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions. by Silviu Baranga · 12 years ago
  16. ca3cd41 Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate. by Silviu Baranga · 12 years ago
  17. 2d524b0 Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits by Kevin Enderby · 13 years ago
  18. b422d0b Fixed disassembler for vstm/vldm ARM VFP instructions. by Silviu Baranga · 13 years ago
  19. 2727930 ARM: Add missing two-operand VBIC aliases. by Jim Grosbach · 13 years ago
  20. 0a552d6 Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures. by Richard Barton · 13 years ago
  21. 54319e2 ARM: Add a few missing add->sub aliases w/ 'w' suffix. by Jim Grosbach · 13 years ago
  22. 94b590f ARM: allow vanilla expressions for movw/movt. by Jim Grosbach · 13 years ago
  23. 686c018 MC: Unknown assembler directives are now hard errors. by Jim Grosbach · 13 years ago
  24. a9cc08f ARM: Thumb add(sp plus register) asm constraints. by Jim Grosbach · 13 years ago
  25. 04a09a4 Fix ARM assembly parsing for upper case condition codes on IT instructions. by Richard Barton · 13 years ago
  26. 71275b1 Missed some register numbers. by Benjamin Kramer · 13 years ago
  27. a356e94 Update edis test for r155704. by Benjamin Kramer · 13 years ago
  28. cac31de Specify cpu to unbreak tests. by Evan Cheng · 13 years ago
  29. 14ce6fa ARM: improved assembler diagnostics for missing CPU features. by Jim Grosbach · 13 years ago
  30. 24e767d Add missing test cases for ARM VLD3 (single 3-element structure to all lanes) by Kevin Enderby · 13 years ago
  31. 2c66edf Add missing test cases for ARM VLD4 (single 4-element structure to all lanes) by Kevin Enderby · 13 years ago
  32. c34954d ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI. by Jim Grosbach · 13 years ago
  33. 10a3933 Add ARM mode tests for the NEON vector shift-accumulate tests. by Jim Grosbach · 13 years ago
  34. 2b85250 Tidy up. Reformat for ease of reading. by Jim Grosbach · 13 years ago
  35. d8b3ed8 ARM: Update NEON assembly two-operand aliases. by Jim Grosbach · 13 years ago
  36. 181b147 ARM some VFP tblgen'erated two-operand aliases. by Jim Grosbach · 13 years ago
  37. bfb3c5a Tidy up. Formatting. by Jim Grosbach · 13 years ago
  38. 35ee7d2 Added support for disassembling unpredictable swp/swpb ARM instructions. by Silviu Baranga · 13 years ago
  39. 6b9f97d Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors. by Silviu Baranga · 13 years ago
  40. fa1ebc6 Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them. by Silviu Baranga · 13 years ago
  41. e546c4c Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction. by Silviu Baranga · 13 years ago
  42. 9e71231 Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler. by Silviu Baranga · 13 years ago
  43. ecdc9d5 Add disassembler to MIPS. by Akira Hatanaka · 13 years ago
  44. c5a2a33 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes) by Kevin Enderby · 13 years ago
  45. bf42f24 ARM two-operand forms for vhadd and vhsub instructions. by Jim Grosbach · 13 years ago
  46. 68f89a6 MC assembly parser handling for trailing comma in macro instantiation. by Jim Grosbach · 13 years ago
  47. 1fbfea7 This patch fixes 3 problems: by Akira Hatanaka · 13 years ago
  48. 199366a ARM assembly two-operand forms for VRSHL. by Jim Grosbach · 13 years ago
  49. 695eca6 Tidy up. Test formatting. by Jim Grosbach · 13 years ago
  50. 3ef7edc Do not add offset in applyFixup. This has already been accounted for in Value. by Akira Hatanaka · 13 years ago
  51. 705e257 ARM two-operand aliases for VRHADD instructions. by Jim Grosbach · 13 years ago
  52. dbd6ba3 Tidy up. Testcase formatting. by Jim Grosbach · 13 years ago
  53. d0c478d Add -disassemble support for -show-inst and -show-encode capability llvm-mc. Also refactor so all MC paraphernalia are created once for all uses as much as possible. by Richard Barton · 13 years ago
  54. b318cc1 Fixed a case of ARM disassembly getting an assert on a bad encoding by Kevin Enderby · 13 years ago
  55. 1835547 ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction. by Jim Grosbach · 13 years ago
  56. 6073b30 ARM 'vzip.32 Dd, Dm' is a pseudo-instruction. by Jim Grosbach · 13 years ago
  57. bee78fe Clean up ARM fused multiply + add/sub support some more: rename some isel by Evan Cheng · 13 years ago
  58. 0d82fe7 Add retw and lretw instructions. Also, fix Intel syntax parsing for all by Charles Davis · 13 years ago
  59. a69da35 Fix ARM disassembly of VLD instructions with writebacks.  And add test a case by Kevin Enderby · 13 years ago
  60. a5378eb ARM add missing Thumb1 two-operand aliases for shift-by-immediate. by Jim Grosbach · 13 years ago
  61. 82509e5 Fix a number of problems with ARM fused multiply add/subtract instructions. by Evan Cheng · 13 years ago
  62. a23ecc2 ARM fix cc_out operand handling for t2SUBrr instructions. by Jim Grosbach · 13 years ago
  63. e45cddf Add the tests that were supposed to go with r153935 that I forgot svn add by Craig Topper · 13 years ago
  64. 4e53fe8 ARM assembly aliases for add negative immediates using sub. by Jim Grosbach · 13 years ago
  65. 1c01249 Added support for unpredictable ADC/SBC instructions on ARM, and also fixed some corner cases involving the PC register as an operand for these instructions. by Silviu Baranga · 13 years ago
  66. 82e1bba Added support for handling unpredictable arithmetic instructions on ARM. by Silviu Baranga · 13 years ago
  67. 22378fd ARM assembly aliases for two-operand V[R]SHR instructions. by Jim Grosbach · 13 years ago
  68. b657a90 ARM assembly parsing for 'msr' plain 'cpsr' operand. by Jim Grosbach · 13 years ago
  69. 769bbfd Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. by Craig Topper · 13 years ago
  70. 9dd16d4 Revert r153924. Delete test/MC/Disassembler/Mips and lib/Target/Mips/Disassembler. by Akira Hatanaka · 13 years ago
  71. 0236594 Revert r153924. There were buildbot failures. by Akira Hatanaka · 13 years ago
  72. 885020a MIPS disassembler support. by Akira Hatanaka · 13 years ago
  73. a551a48 Initial 64 bit direct object support. by Akira Hatanaka · 13 years ago
  74. 50ac2e9 Added fix in TableGen instruction decoder generation. The decoder now breaks for every leaf node. by Silviu Baranga · 13 years ago
  75. ad353c6 ARM assembler should prefer non-aliases encoding of cmp. by Jim Grosbach · 13 years ago
  76. a45e374 ARM encoding for VSWP got the second operand incorrect. by Jim Grosbach · 13 years ago
  77. 2d30d94 ARM integrated assembler should encoding choice for add/sub imm. by Jim Grosbach · 13 years ago
  78. c0164f8 ARM assembly parsing needs to be paranoid about negative immediates. by Jim Grosbach · 13 years ago
  79. cb0809b Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. by James Molloy · 13 years ago
  80. b22e70d ARM assembly 'cmp lr, #0' should not encode using 'cmn'. by Jim Grosbach · 13 years ago
  81. 6e9d66c Fixup VST1.32 with writeback instruction. Also re-factor non-writeback version. by Richard Barton · 13 years ago
  82. cc85160 Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu by Eli Bendersky · 13 years ago
  83. 6fe310e Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM. by Silviu Baranga · 13 years ago
  84. b7c2ed6 Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT instruction on ARM by Silviu Baranga · 13 years ago
  85. a0c48eb Added soft fail cases for the disassembler when decoding MUL instructions on ARM. by Silviu Baranga · 13 years ago
  86. f0586f0 Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add test by Kevin Enderby · 13 years ago
  87. 4fd3d29 Fix generation of the address size override prefix. Add assertions for by Joerg Sonnenberger · 13 years ago
  88. fb54afb Incremental big endian patch by Jack Carter. by Akira Hatanaka · 13 years ago
  89. 48c9533 Assembler should accept redefinitions of unused variable symbols. by Jim Grosbach · 13 years ago
  90. 9f2e160 Fix assembling ARM vst2 instructions with double-spaced registers. by Kevin Enderby · 13 years ago
  91. 07cdd80 ARM non-scattered MachO relocations for movw/movt. by Jim Grosbach · 13 years ago
  92. 5c062ad The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this. by Silviu Baranga · 13 years ago
  93. ae151ed MC asm parser macro argument count was wrong when empty. by Jim Grosbach · 13 years ago
  94. be7cf2b ARM ldm/stm register lists can be out of order. by Jim Grosbach · 13 years ago
  95. 213d2e7 ARM optional operand on MRC/MCR assembly instructions. by Jim Grosbach · 13 years ago
  96. 9426ac7 ARM vmrs system registers mvfr0 and mvfr1 handling. by Jim Grosbach · 13 years ago
  97. b84ad4a ARM case-insensitive checking for APSR_nzcv. by Jim Grosbach · 13 years ago
  98. 8a6bcc3 Fix VCVT decoding (between floating-point and fixed-point, Floating-point). Patch by Richard Barton. by Kristof Beyls · 13 years ago
  99. 0f5ab7c Change the X86 assembler to not require a segment register on string by Kevin Enderby · 13 years ago
  100. 8b15278 Change the second line of the test added for r152414 to use CHECK-NEXT. by Kevin Enderby · 13 years ago