- 8b3a8f5 Don't set kill flags for instructions which the scheduler has cloned. by Dan Gohman · 15 years ago
- 4ee637c BR is a barrier. by Dan Gohman · 15 years ago
- f84d60b Several tail call tests apparently rely upon this being "adjusts stack" instead by Bill Wendling · 15 years ago
- e97dda4 Avoid scanning the long tail of physreg operands on calls by Jakob Stoklund Olesen · 15 years ago
- 26c6995 Do not forget to mark prcessed arguments. by Devang Patel · 15 years ago
- 8a65c51 Count coalesced copies by Jakob Stoklund Olesen · 15 years ago
- a0e618d Allow virtreg redefines when verifying for RegAllocFast by Jakob Stoklund Olesen · 15 years ago
- 55ed945 This should happen if there are no calls, not if it just doesn't adjust the by Bill Wendling · 15 years ago
- 0fc546b Revert r103804. The comment is correct. by Bill Wendling · 15 years ago
- 01384ef Remove trailing whitespace by Jim Grosbach · 15 years ago
- 9001303 80 column and trailing whitespace cleanup by Jim Grosbach · 15 years ago
- 5468e09 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful by Jim Grosbach · 15 years ago
- d33fa0f Fix comment. by Bill Wendling · 15 years ago
- b92187a Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what by Bill Wendling · 15 years ago
- 71ea4e5 Lowering of atomic instructions can result in operands being by Dan Gohman · 15 years ago
- 98e1cac Add support to preserve type info for the variables that are removed by the optimizer. by Devang Patel · 15 years ago
- 1b2c761 When verifying two-address instructions, check the following: by Jakob Stoklund Olesen · 15 years ago
- c3ce05c Fix so "int3" is correctly accepted, added "into" and fixed "int" with an by Kevin Enderby · 15 years ago
- 5c6aba2 Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE. by Evan Cheng · 15 years ago
- f0f6cdb MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be by Daniel Dunbar · 15 years ago
- 4ed1082 Simplify the handling of physreg defs and uses in RegAllocFast. by Jakob Stoklund Olesen · 15 years ago
- effc8c5 Set isTerminator on TRAP instructions. by Dan Gohman · 15 years ago
- c0c32ae Don't use isBarrier for the PowerPC sync instruction. isBarrier is for by Dan Gohman · 15 years ago
- 7f357ec Add mayLoad and mayStore flags to instructions which missed them. by Dan Gohman · 15 years ago
- bd616b6 XFAIL the test I added with vg_leak, apparently it is the first and only llc by Daniel Dunbar · 15 years ago
- d11d59e Inline Asm: Ensure buffer is newline terminated to match how the text is printed. by Daniel Dunbar · 15 years ago
- 7ff82e1 Enable opportunistic coalescing by Jakob Stoklund Olesen · 15 years ago
- 22c687b Added a QQQQ register file to model 4-consecutive Q registers. by Evan Cheng · 15 years ago
- 482eba0 Add AsmParser support for darwin tbss directive. by Eric Christopher · 15 years ago
- c260a3e Fix a couple of typos. by Eric Christopher · 15 years ago
- 47b3ec4 MC: Switch to completely lazy layout. by Daniel Dunbar · 15 years ago
- 9005d45 MC: Extend MCAsmLayout to explicitly track which fragments have been layed out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order. by Daniel Dunbar · 15 years ago
- 11c4111 MC: Implicitly assign section addresses when the previous fragment is layed out. by Daniel Dunbar · 15 years ago
- 337718e MC: Switch MCFragment to storing the layout order index, not its index in the file. by Daniel Dunbar · 15 years ago
- afc6acd MC: Change LayoutSection() to only do the section initializiation. by Daniel Dunbar · 15 years ago
- 7f68719 Fix comments. by Evan Cheng · 15 years ago
- 57b6076 Trust kill flags from isel and later passes. by Jakob Stoklund Olesen · 15 years ago
- 7d4f259 Fix an embarrassing runtime regression for RegAllocFast. by Jakob Stoklund Olesen · 15 years ago
- dbf67fe Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. by Evan Cheng · 15 years ago
- a5afa1c Implement a correct ui64->f32 conversion. The old by Dale Johannesen · 15 years ago
- c9c4dac Clean up RegAllocFast debug output by Jakob Stoklund Olesen · 15 years ago
- b69fc04 MC: Move Layout{Fragment,Section} into MCAsmLayout, and add LayoutFile(). by Daniel Dunbar · 15 years ago
- e6cd757 Teach MachineLICM and MachineSink how to clear kill flags conservatively by Dan Gohman · 15 years ago
- c4ca40e Add comment about the pseudo registers QQ, each of which is a pair of Q registers. by Evan Cheng · 15 years ago
- 1190c14 Fix pr7110: For non-Darwin targets UnspilledCS1GPRs may include high registers. by Bob Wilson · 15 years ago
- ed36aac CMake: fixes 64 bit Visual Studio IDE build. Fixes bug 4936. by Oscar Fuentes · 15 years ago
- 49b4589 Add a utility function for conservatively clearing kill flags, and make by Dan Gohman · 15 years ago
- e1308d8 An Instruction has a trivial kill only if its use is in the same basic block. by Dan Gohman · 15 years ago
- 2c18d3b MC: Factor out MCAssembler::ComputeFragmentSize. by Daniel Dunbar · 15 years ago
- f60c736 MC: Add section layout order indices to MCSectionData. by Daniel Dunbar · 15 years ago
- 49ed921 MC: Move ordinal calculation, to make sure fragments synthesized for layout get assigned ordinals properly. by Daniel Dunbar · 15 years ago
- 09d3465 MC: Create dummy fragments to avoid ever having empty sections, which simplifies layout. by Daniel Dunbar · 15 years ago
- aa0d350 MC: Add MCAsmLayout::FragmentReplaced() helper function. by Daniel Dunbar · 15 years ago
- 61aeed1 Properly set thread-local flag on globals during cpp emission by Anton Korobeynikov · 15 years ago
- 911ae39 Remove heinous tabs. by Nick Lewycky · 15 years ago
- 33ab0b1 Replace the core comparison login in merge functions. We can now merge by Nick Lewycky · 15 years ago
- 054be92 Fix -Asserts warning. by Daniel Dunbar · 15 years ago
- 2661f11 MC: Eliminate MCSectionData::{,Address,File}Size, which can now be computed by by Daniel Dunbar · 15 years ago
- 1860e7d Fix -Asserts warning. by Daniel Dunbar · 15 years ago
- 61066db MC: Switch to using explicit MCAlignFragments with OnlyAlignAddress bit instead by Daniel Dunbar · 15 years ago
- 69b9f98 Bring back VLD1q and VST1q and use them for reloading / spilling Q registers. This allows folding loads and stores into VMOVQ. by Evan Cheng · 15 years ago
- 456b501 MC: Add MCAlignFragment::OnlyAlignAddress bit. This is a bit of magic that says the align fragment shouldn't contribute to the logical section size, it is will be used for cleaning up the code to handle section alignment. by Daniel Dunbar · 15 years ago
- b5844ff MC: Add MCSectionData::AddressSize, which is the size of the address space consumed by the section. This can differ from both the section logical size, and the section size on disk (although the current code handles this without making an explicit distinction). by Daniel Dunbar · 15 years ago
- 4bf4baf Take allocation hints from copy instructions to/from physregs. by Jakob Stoklund Olesen · 15 years ago
- 63e34f6 More asserts around physreg uses by Jakob Stoklund Olesen · 15 years ago
- d929f77 Expand VMOVQQ into a pair of VMOVQ. by Evan Cheng · 15 years ago
- 020cc1b Mark some pattern-less instructions as neverHasSideEffects. by Evan Cheng · 15 years ago
- 7bb7c55 fix rdar://7965971 and a fixme: use ParseIdentifier in by Chris Lattner · 15 years ago
- b5505d0 reapply r103668 with a fix. Never make "minor syntax changes" by Chris Lattner · 15 years ago
- 054dbb8 If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced. by Evan Cheng · 15 years ago
- de7dea2 Do not attempt copy coalescing if the source and dest sub-register indices do not match. by Evan Cheng · 15 years ago
- 3519f9d revert r103668 for now, it is apparently breaking things. by Chris Lattner · 15 years ago
- 0de8e3f moffset forms of moves are x86-32 only, make the parser by Chris Lattner · 15 years ago
- 4313007 Fix some potential issues in the pseudo instruction expansion phase: copy implicit operands and memoperands. Also, expand instructions even if their defs are "dead" since they may have implicit kill operands. by Evan Cheng · 15 years ago
- 1c15413 MC: Move MCAlignFragment::EmitNops value out of the constructor. by Daniel Dunbar · 15 years ago
- 4e54487 MC: Eliminate MCZeroFillFragment, it is no longer needed. by Daniel Dunbar · 15 years ago
- e2fee5b MC: Explicitly check that only virtual fragments appear in virtual sections. by Daniel Dunbar · 15 years ago
- 3153fec MC: Switch MCFillFragment to storing total fill size instead of a count. This allows using ValueSize==0 to represent a virtual fill. by Daniel Dunbar · 15 years ago
- e73d49e MC: Drop support for alignment in ZeroFill fragment, we can just use by Daniel Dunbar · 15 years ago
- 2745f6e fix the encoding of the obscure "moffset" forms of moves, i386 by Chris Lattner · 15 years ago
- 9a1581b Clear CachedFunctionInfo upon Pass::releaseMemory. Because ValueMap will abort by Nick Lewycky · 15 years ago
- 52f8dff Simplify. by Daniel Dunbar · 15 years ago
- f0d17d2 MC: Factor out MCAssembler::LayoutFragment by Daniel Dunbar · 15 years ago
- 2d891a2 MC: Tweak section layout to not relying on accumulating address value. by Daniel Dunbar · 15 years ago
- a4d73d0 Remove a dead fixme. by Evan Cheng · 15 years ago
- 804291e Make sure to add kill flags to the last use of a virtreg when it is redefined. by Jakob Stoklund Olesen · 15 years ago
- d13a0ca MC: Simplify LayoutSection to just take the index of the section to layout. by Daniel Dunbar · 15 years ago
- bc1a0cf MC: Track section layout order explicitly, and use to simplify. by Daniel Dunbar · 15 years ago
- 62d50e8 stylistic change to MCSectionCOFF::PrintSwitchToSection COMDAT handling by Nathan Jeffords · 15 years ago
- 5b1b3b7 Remove unused variable. Tweak a comment while there. by Duncan Sands · 15 years ago
- 18c1021 Add support for movi32 of global values to the new (MC) asm printer. by Rafael Espindola · 15 years ago
- 871bb94 updated support for the COFF .linkonce by Nathan Jeffords · 15 years ago
- 5bdc2aa vst instructions are modeled as this: by Evan Cheng · 15 years ago
- 736f89b Teach local regalloc about virtual registers with sub-indices. by Evan Cheng · 15 years ago
- 3ae56bc Code clean up. by Evan Cheng · 15 years ago
- 0481449 MC/X86: Extend suffix matching hack to match 'q' suffix. by Daniel Dunbar · 15 years ago
- a5f1d57 MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can by Daniel Dunbar · 15 years ago
- 1a1ad57 Avoid scoping issues, fix buildbots by Jakob Stoklund Olesen · 15 years ago
- a6cb641 Add initial kill flag support to FastISel. by Dan Gohman · 15 years ago
- 0efd768 Make Clang happy. by Daniel Dunbar · 15 years ago