- 8c6cb31 Update the docs with the new workload that was added. by Nadav Rotem · 12 years ago
- 13eb1e7 LoopVectorizer: Optimize the vectorization of consecutive memory access when the iteration step is -1 by Nadav Rotem · 12 years ago
- f1a26cf Fix comment typo by Eli Bendersky · 12 years ago
- b53be53 [msan] Raise alignment of origin stores/loads when possible. by Evgeniy Stepanov · 12 years ago
- ab29644 [msan] Expand the file comment with track-origins info. by Evgeniy Stepanov · 12 years ago
- 23c5021 Fix quoting in configure. Patch by Krzysztof Parzyszek! by Benjamin Kramer · 12 years ago
- 0a5ead9 Merge still more SSE/AVX instruction definitions. by Craig Topper · 12 years ago
- 07555fc Merge more SSE/AVX instruction definitions. by Craig Topper · 12 years ago
- fc093de TableGen/FixedLenDecoderEmitter.cpp: Fix a potential mask overflow in fieldFromInstruction(). by NAKAMURA Takumi · 12 years ago
- 00ba301 revert an accidental commit. by Nadav Rotem · 12 years ago
- 755841d Fix 80 column violation. by Craig Topper · 12 years ago
- 6f9d44e Fix class name in comment. by Craig Topper · 12 years ago
- 219bc2d Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions. by Craig Topper · 12 years ago
- f7769e3 Doc: add fmuladd to the list of vectorizeable functions. Thanks hfinkel. by Nadav Rotem · 12 years ago
- 02082ef Remove 'v' from mnemonic to fix asm matching failures. by Craig Topper · 12 years ago
- 3cdc382 Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for a bunch of SSE2 integer arithmetic instructions. by Craig Topper · 12 years ago
- a05f7cb Reformat the docs. by Nadav Rotem · 12 years ago
- 4595528 white space by Nadav Rotem · 12 years ago
- 09a326d Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for PAND/POR/PXOR/PANDN by Craig Topper · 12 years ago
- 1fe132a Merge an AVX/SSE 256-bit and 128-bit multiclass. by Craig Topper · 12 years ago
- b5c590a Mark VANDNPD/VANDNPDS as not commutable. by Craig Topper · 12 years ago
- b1a3baf llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083. by NAKAMURA Takumi · 12 years ago
- 05c8fd9 llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082. by NAKAMURA Takumi · 12 years ago
- 174a3d3 Remove alignment from a bunch more VEX encoded operations in the folding tables. by Craig Topper · 12 years ago
- d83a73a Remove alignment from folding table for VMOVUPD as an unaligned instruction it shouldn't require alignment... by Craig Topper · 12 years ago
- 1ac0046 Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit stores which aren't required to be aligned on SSE or AVX. by Craig Topper · 12 years ago
- a777284 BBVectorize: Use VTTI to compute costs for intrinsics vectorization by Hal Finkel · 12 years ago
- 0f77910 Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171049. This instruction doesn't require alignment. by Craig Topper · 12 years ago
- 1d59f5f LoopVectorize: Enable vectorization of the fmuladd intrinsic by Hal Finkel · 12 years ago
- 64a7a24 BBVectorize: Enable vectorization of the fmuladd intrinsic by Hal Finkel · 12 years ago
- abdf755 Loosen scheduling restrictions on the PPC dcbt intrinsic by Hal Finkel · 12 years ago
- cd9ea51 Expand PPC64 atomic load and store by Hal Finkel · 12 years ago
- 59a65f7 [msan] Fix handling of vectors of pointers. by Evgeniy Stepanov · 12 years ago
- 6607716 [msan] Fix handling of select with vector condition. by Evgeniy Stepanov · 12 years ago
- 50ec431 Harden test so it's not affected by changes to compare lowering. by Benjamin Kramer · 12 years ago
- 99f7806 X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity. by Benjamin Kramer · 12 years ago
- 382ed78 X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. by Benjamin Kramer · 12 years ago
- 4684858 ASan: initialize callbacks from ASan module pass in a separate function for consistency by Alexey Samsonov · 12 years ago
- 59cca13 ASan: move stack poisoning logic into FunctionStackPoisoner struct by Alexey Samsonov · 12 years ago
- 08d785b Fix whitespace. No functionality change. by Nick Lewycky · 12 years ago
- a4c8a32 VCVTSS2SD requires a strict alignment. Thanks Elena. by Nadav Rotem · 12 years ago
- 04de315 Rename LLVMContext diagnostic handler types and functions. by Bob Wilson · 12 years ago
- 3d662d5 [CMake] AddLLVM.cmake: Tweak the corner case that "check-all" doesn't have any tests. by NAKAMURA Takumi · 12 years ago
- 71f30bf Quiet gcc's -Wparenthesis warning. No functionality change. by Nick Lewycky · 12 years ago
- c18f889 Fix typo "Makre" -> "Make". by Nick Lewycky · 12 years ago
- 791dbb3 Use a std::string rather than a dynamically allocated char* buffer. by Benjamin Kramer · 12 years ago
- a0be09f Add LLVMContext::emitWarning methods and use them. <rdar://problem/12867368> by Bob Wilson · 12 years ago
- fa45cdf Fix a typo introduced in r168577: FlAGS -> FLAGS (note the lowercase ell) by Dmitri Gribenko · 12 years ago
- 0fa62a3 AutoRegen.sh: update reference to documentation by Dmitri Gribenko · 12 years ago
- 34cb54b llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple. by NAKAMURA Takumi · 12 years ago
- 1e1c5f3 CostModel: We have API for checking the costs of known shuffles. This patch adds by Nadav Rotem · 12 years ago
- 94d7ab7 Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64 by Elena Demikhovsky · 12 years ago
- 4b25467 Removed "static" from "__jit_debug_descriptor" because "static" adds C++ mangling prefix to this symbol. by Elena Demikhovsky · 12 years ago
- ace0c2f Some x86 instructions can load/store one of the operands to memory. On SSE, this memory needs to be aligned. by Nadav Rotem · 12 years ago
- 9e5329d LoopVectorizer: When checking for vectorizable types, also check by Nadav Rotem · 12 years ago
- daf7b5c Change the codegen Cost Model API for shuffeles. This patch removes the API for broadcast and adds a more general API that accepts an enum of known shuffles. by Nadav Rotem · 12 years ago
- 3a19999 Fix typo in comments by Alexey Samsonov · 12 years ago
- 99b7a99 Update the docs of the cost model. by Nadav Rotem · 12 years ago
- 85e910f llvm/MC/MCMachObjectWriter.h: ComputeSymbolTable(): Prune one description in the comment. [-Wdocumentation] by NAKAMURA Takumi · 12 years ago
- 470ea9b LoopVectorizer: Fix an endless loop in the code that looks for reductions. by Nadav Rotem · 12 years ago
- a048c23 Documentation: fix typos reported in PR13866 by Dmitri Gribenko · 12 years ago
- 6f3d81a CostModel: Change the default target-independent implementation for finding by Nadav Rotem · 12 years ago
- a1acf55 LoopVectorize: Fix accidentaly inverted condition. by Benjamin Kramer · 12 years ago
- 417872e LoopVectorize: For scalars and void types there is no need to compute vector insert/extract costs. by Benjamin Kramer · 12 years ago
- f85ec86 We are not ready to estimate the cost of integer expansions based on the number of parts. This test is too noisy. by Nadav Rotem · 12 years ago
- d63c668 docs: Add link to external LLVM backend tutorial. by Sean Silva · 12 years ago
- 40b04a4 whitespace by Nadav Rotem · 12 years ago
- 677689c Rename a function. by Nadav Rotem · 12 years ago
- d54fed2 Loop Vectorizer: Update the cost model of scatter/gather operations and make by Nadav Rotem · 12 years ago
- c4265e1 Remove trailing whitespace. by Craig Topper · 12 years ago
- 8a8413d Remove trailing whitespace by Craig Topper · 12 years ago
- 037435d Remove a special case that doesn't seem necessary any longer. by Jakob Stoklund Olesen · 12 years ago
- 021e3b6 Use getNumOperands() instead of Operands.size(). by Jakob Stoklund Olesen · 12 years ago
- 2f8a6cd X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. by Benjamin Kramer · 12 years ago
- 1734791 X86: Emit vector sext as shuffle + sra if vpmovsx is not available. by Benjamin Kramer · 12 years ago
- b44c1f9 Add a comma to fix the build. by Craig Topper · 12 years ago
- 3f92b1b Use a negative value to represent INVALID_SIMPLE_VALUE_TYPE instead of 256. Its much cheaper for the isSimple() checks to look for values less than 0 rather than a value greater than 255. This shaves ~8k off the size of the llc binary on x86-64. by Craig Topper · 12 years ago
- bf50d07 Add vAny and Metadata to the switch in getSizeInBits for consistency since every other enum was listed. by Craig Topper · 12 years ago
- 70d4e75 [utils] Tweak utils/clang-parse-diagnostics-file to ignore autoconf diagnostics. by Daniel Dunbar · 12 years ago
- 629fb82 Change 'AttrVal' to 'AttrKind' to better reflect that it's a kind of attribute instead of the value of the attribute. by Bill Wendling · 12 years ago
- 9679a04 Fix some undefined behavior when parsing YAML input: don't try to compare an by Richard Smith · 12 years ago
- 2b45dd5 Don't call back() on an empty SmallVector. Found by -fsanitize=enum! by Richard Smith · 12 years ago
- d0696ef In some cases, due to scheduling constraints we copy the EFLAGS. by Nadav Rotem · 12 years ago
- dbf51ee [mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardware by Akira Hatanaka · 12 years ago
- e8bc10b [mips] Refactor SYNC and multiply/divide instructions. by Akira Hatanaka · 12 years ago
- aa7c9cd [mips] Refactor BAL instructions. by Akira Hatanaka · 12 years ago
- 1892253 [mips] Fix encoding of BAL instruction. Also, fix assembler test case which by Akira Hatanaka · 12 years ago
- 6a8309e [mips] Refactor jump, jump register, jump-and-link and nop instructions. by Akira Hatanaka · 12 years ago
- 0a57dc1 [mips] Refactor load/store left/right and load-link and store-conditional by Akira Hatanaka · 12 years ago
- 1616465 [mips] Refactor load/store instructions. by Akira Hatanaka · 12 years ago
- 5f5770b [mips] Remove unnecessary isPseudo parameter. by Akira Hatanaka · 12 years ago
- 8e719fa [mips] Refactor LUI instruction. by Akira Hatanaka · 12 years ago
- 35242e2 [mips] Refactor count leading zero or one instructions. by Akira Hatanaka · 12 years ago
- 8aaed99 [mips] Refactor sign-extension-in-register instructions. by Akira Hatanaka · 12 years ago
- 7de001b [mips] Refactor instructions which copy from and to HI/LO registers. by Akira Hatanaka · 12 years ago
- 2a732ec [mips] Refactor logical NOR instructions. by Akira Hatanaka · 12 years ago
- a8215f4 [mips] Move instruction definitions in MipsInstrInfo.td. by Akira Hatanaka · 12 years ago
- b06c540 R600: Coding style - remove empty spaces from the beginning of functions by Tom Stellard · 12 years ago
- eef0d5a R600: Fix MAX_UINT definition by Tom Stellard · 12 years ago
- fe13e70 R600: Add SHADOWCUBE to TEX_SHADOW pattern by Tom Stellard · 12 years ago