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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 8cbc94afb71fd2da72d8f1284f7f53e39019fdec / lib / CodeGen / RegAllocLinearScan.cpp
  1. f9f1da1 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. by Evan Cheng · 16 years ago
  2. 857c4e0 VNInfo cleanup. by Lang Hames · 16 years ago
  3. 358dec5 Part 1. by Evan Cheng · 16 years ago
  4. 90f95f8 Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them. by Evan Cheng · 16 years ago
  5. 073e7e5 RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets. by Evan Cheng · 16 years ago
  6. 550aacb A value defined by an implicit_def can be liven to a use BB. This is unfortunate. But register allocator still has to add it to the live-in set of the use BB. by Evan Cheng · 16 years ago
  7. e5eb6d2 Remove a #include of <iostream>. by Dan Gohman · 16 years ago
  8. fcad172 Removed more testing code that snuck in earlier. by Lang Hames · 16 years ago
  9. 7ccf4a0 Fixed warning, removed some temporary validation code that snuck in during my last commit. by Lang Hames · 16 years ago
  10. f41538d Update to in-place spilling framework. Includes live interval scaling and trivial rewriter. by Lang Hames · 16 years ago
  11. e2b201b New Spiller interface and trivial implementation. by Lang Hames · 16 years ago
  12. eca24fb Teach TransferDeadness to delete truly dead instructions if they do not produce side effects. by Evan Cheng · 16 years ago
  13. 87e3bca Renamed Spiller classes (plus uses and related files) to VirtRegRewriter. by Lang Hames · 16 years ago
  14. c781a24 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. by Evan Cheng · 16 years ago
  15. 5b16cd2 Code clean up. Bye bye PhysRegTracker. by Evan Cheng · 16 years ago
  16. 96f3fd9 spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixed_ IntervalPtrs. Reset them. by Evan Cheng · 16 years ago
  17. 1c2f6da Determine allocation 'preference' with right register class. I haven't seen this changing codegen so no test case. by Evan Cheng · 16 years ago
  18. 5b69eba It has finally happened. Spiller is now using live interval info. by Evan Cheng · 16 years ago
  19. c4f718a - Remove an arbitrary spill weight tweak that should not have been there. by Evan Cheng · 16 years ago
  20. 206d185 Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. by Evan Cheng · 16 years ago
  21. 5d088fe Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. by Evan Cheng · 16 years ago
  22. 2824a65 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 16 years ago
  23. 49c8aa0 Convert VirtRegMap to a MachineFunctionPass. by Owen Anderson · 16 years ago
  24. 1ed5b71 Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. by Owen Anderson · 16 years ago
  25. 04ee5a1 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  26. d0deec2 Make linear scan's trivial coalescer slightly more aggressive. by Evan Cheng · 17 years ago
  27. d68a076 Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 17 years ago
  28. 5489893 - More pre-split fixes: spill slot live interval computation bug; restore point bug. by Evan Cheng · 17 years ago
  29. d0e32c5 - Rewrite code that update register live interval that's split. by Evan Cheng · 17 years ago
  30. f5cd4f0 Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. by Evan Cheng · 17 years ago
  31. b8cab92 Fix command-line option printing to print two spaces where needed, by Dan Gohman · 17 years ago
  32. 95dad83 Add an option to enable StrongPHIElimination, for ease of testing. by Owen Anderson · 17 years ago
  33. dc37786 Re-apply 56835 along with header file changes. by Evan Cheng · 17 years ago
  34. 46292be Revert commit 56835 since it breaks the build. by Duncan Sands · 17 years ago
  35. d41474d If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. by Evan Cheng · 17 years ago
  36. 86b49f8 Next round of earlyclobber handling. Approach the by Dale Johannesen · 17 years ago
  37. 34d8f75 Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 17 years ago
  38. 5e8d9de Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 17 years ago
  39. d6bd733 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 17 years ago
  40. fa48f94 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 17 years ago
  41. 841ee1a Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. by Evan Cheng · 17 years ago
  42. 91aac10 Add a bit to mark operands of asm's that conflict by Dale Johannesen · 17 years ago
  43. 5530216 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. by Evan Cheng · 17 years ago
  44. ae73dc1 Tidy up several unbeseeming casts from pointer to intptr_t. by Dan Gohman · 17 years ago
  45. cd1dcbd Convert several std::vectors over to SmallVector, and use reserve() as appropriate for cases where std::vector is still used. by Owen Anderson · 17 years ago
  46. 9738216 Get rid of a use of std::map. by Owen Anderson · 17 years ago
  47. 03857b2 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated by Owen Anderson · 17 years ago
  48. 496bac5 Fix a compile-time regression introduced by my heuristic-changing patch. I forgot by Owen Anderson · 17 years ago
  49. a1566f2 Change the heuristics used in the coalescer, register allocator, and within by Owen Anderson · 17 years ago
  50. 51cd9d6 A brief survey of priority_queue usage in the tree turned this up by Dan Gohman · 17 years ago
  51. 3e17225 Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate. by Evan Cheng · 17 years ago
  52. 9c3c221 Refine stack slot interval weight computation. by Evan Cheng · 17 years ago
  53. 3f32d65 Add a stack slot coloring pass. Not yet enabled. by Evan Cheng · 17 years ago
  54. f2b24ca Do not add empty live intervals to handled_. They should never be undone for backtracking. by Evan Cheng · 17 years ago
  55. f30a49d Special handling of zero-sized live intervals. by Evan Cheng · 17 years ago
  56. af8c563 Add an assertion to catch register of illegal class. by Evan Cheng · 17 years ago
  57. c438f35 Undo tweak. It had no obvious benefit. by Evan Cheng · 17 years ago
  58. 676dd7c When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. by Evan Cheng · 17 years ago
  59. 524f961 Temporarily revert 48175. by Evan Cheng · 17 years ago
  60. a341380 If the register allocator ran out of registers, just abort for now. by Evan Cheng · 17 years ago
  61. fe42462 Use a smallvector for inactiveCounts and initialize it lazily by Chris Lattner · 17 years ago
  62. e6d088a Rename PrintableName to Name. by Bill Wendling · 17 years ago
  63. 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 17 years ago
  64. 4aefd6b Fix newly-introduced 4.3 warnings by Anton Korobeynikov · 17 years ago
  65. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 17 years ago
  66. 67d65bb Don't recalculate the loop info and loop dominators analyses if they're by Bill Wendling · 18 years ago
  67. 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  68. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  69. 22f07ff Switch over to MachineLoopInfo. by Evan Cheng · 18 years ago
  70. 81a0382 Live interval splitting: by Evan Cheng · 18 years ago
  71. 5b8318a Adding debug output during coalescing. by Bill Wendling · 18 years ago
  72. 87075ca Need to increment the iterator. by Bill Wendling · 18 years ago
  73. f2fbca6 Refactor some code. by Evan Cheng · 18 years ago
  74. 9aeaf75 If an interval is being undone clear its preference as well since the source interval may have been undone as well. by Evan Cheng · 18 years ago
  75. c92da38 There are times when the coalescer would not coalesce away a copy but the copy by Evan Cheng · 18 years ago
  76. a5bfc97 Apply Chris' suggestions. by Evan Cheng · 18 years ago
  77. 3f4b80e Clean up code that calculate MBB live-in's. by Evan Cheng · 18 years ago
  78. 11923cc Some clean up. by Evan Cheng · 18 years ago
  79. 10136e7 Some clean up. by Evan Cheng · 18 years ago
  80. 2c17c4d by David Greene · 18 years ago
  81. 549f27d3 Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. by Evan Cheng · 18 years ago
  82. 2513330 Factor live variable analysis so it does not do register coalescing by David Greene · 18 years ago
  83. e23e00d Change names from RA to something unique to get rid of naming conflicts with by Bill Wendling · 18 years ago
  84. 1997473 Drop 'const' by Devang Patel · 18 years ago
  85. 3e15bf3 Use 'static const char' instead of 'static const int'. by Devang Patel · 18 years ago
  86. 794fd75 Do not use typeinfo to identify pass in pass manager. by Devang Patel · 18 years ago
  87. 6c087e5 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 18 years ago
  88. 92efbfc Clean up. by Evan Cheng · 18 years ago
  89. 20b0abc Copy coalescing change to prevent a physical register from being pin to a by Evan Cheng · 18 years ago
  90. 2638e1a First cut trivial re-materialization support. by Evan Cheng · 18 years ago
  91. bc025fb Only add liveinterval to livein set if it isn't assigned a stack slot. by Evan Cheng · 18 years ago
  92. b371f45 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 18 years ago
  93. a284cbf For PR1207: by Reid Spencer · 18 years ago
  94. e1fd682 Do not add livein's to entry MBB twice. by Evan Cheng · 18 years ago
  95. 9fc508f Add live-ins to every BB. by Evan Cheng · 18 years ago
  96. cd3245a Eliminate static ctors from Statistics by Chris Lattner · 19 years ago
  97. ac0b6ae Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 19 years ago
  98. 4c7e227 eliminate fp statistic by Chris Lattner · 19 years ago
  99. 97af751 Unbreak VC++ build. by Jeff Cohen · 19 years ago
  100. 54fcc7f Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes by Bill Wendling · 19 years ago