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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 917be6814e0a4e529d290be5d806a054bbbc4a27 / lib / CodeGen / SelectionDAG / ScheduleDAG.cpp
  1. 917be68 Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me. by Evan Cheng · 17 years ago
  2. 643afa5 Keep track how many commutes are performed by the scheduler. by Evan Cheng · 17 years ago
  3. 42a7788 Rename CountMemOperands to ComputeMemOperandsEnd to reflect what by Dan Gohman · 17 years ago
  4. e179584 Change how FP immediates are handled. by Nate Begeman · 18 years ago
  5. cc20cd5 From Chris' review: use isa instead of explicitly using classof. by Dan Gohman · 18 years ago
  6. 027ee7e From Chris' review: minor corrections in comments. by Dan Gohman · 18 years ago
  7. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  8. 69de193 Re-apply the memory operand changes, with a fix for the static by Dan Gohman · 18 years ago
  9. a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
  10. 1b08bbc Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. by Evan Cheng · 18 years ago
  11. 334dc1f Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. by Evan Cheng · 18 years ago
  12. 7bdc5f7 Add a comment for a nasty short term hack. by Evan Cheng · 18 years ago
  13. bb81d97 Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. by Evan Cheng · 18 years ago
  14. 175e815 Add more thorough error checking for NULL register classes. by Christopher Lamb · 18 years ago
  15. c6c391d Create a new class, MemOperand, for describing memory references by Dan Gohman · 18 years ago
  16. 965d1b4 Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them. by Evan Cheng · 18 years ago
  17. 6b2cf28 A semi-gross fix for a debug info issue. When inserting the "function start" label (i.e. first label in the entry block) take care to insert it at the beginning of the block. by Evan Cheng · 18 years ago
  18. ff9b373 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert by Evan Cheng · 18 years ago
  19. 3035959 Use empty() instead of comparing size() with zero. by Dan Gohman · 18 years ago
  20. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
  21. 0ff2396 Rename all the M_* flags to be namespace qualified enums, and switch by Chris Lattner · 18 years ago
  22. e32d765 add more and significantly better comments to the rest of the machineinstr by Chris Lattner · 18 years ago
  23. 8f707e1 rename hasVariableOperands() -> isVariadic(). Add some comments. by Chris Lattner · 18 years ago
  24. 349c495 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor by Chris Lattner · 18 years ago
  25. ba6da5d remove some uses of MachineOpCode, move getSchedClass by Chris Lattner · 18 years ago
  26. 8ca5c67 Add predicates methods to TargetOperandInfo, and switch all clients by Chris Lattner · 18 years ago
  27. 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
  28. d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
  29. 534bcfb update a couple of references to SSARegMap. by Chris Lattner · 18 years ago
  30. 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  31. fec65d5 use simplified operand addition methods. by Chris Lattner · 18 years ago
  32. 8019f41 Start using the simplified methods for adding operands. by Chris Lattner · 18 years ago
  33. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  34. 7c07aeb Bug fix. Must also match ResNo when matching an operand with a user. by Evan Cheng · 18 years ago
  35. eb57ea7 Make labels work in asm blocks; allow labels as by Dale Johannesen · 18 years ago
  36. 514ab34 Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize. by Duncan Sands · 18 years ago
  37. 32dfbea EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like by Evan Cheng · 18 years ago
  38. f10c973 If a node that defines a physical register that is expensive to copy. The by Evan Cheng · 18 years ago
  39. cb406c2 Use empty() member functions when that's what's being tested for instead by Dan Gohman · 18 years ago
  40. 22a5299 If two instructions are both two-address code, favors (schedule closer to by Evan Cheng · 18 years ago
  41. 74d2fd8 Trim some unneeded fields. by Evan Cheng · 18 years ago
  42. 42d6027 - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. by Evan Cheng · 18 years ago
  43. 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 18 years ago
  44. a6fb1b6 Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered. by Evan Cheng · 18 years ago
  45. 713a98d Use struct SDep instead of std::pair for SUnit pred and succ lists. First step by Evan Cheng · 18 years ago
  46. 6900132 Remove dead code. by Evan Cheng · 18 years ago
  47. 7df31dc Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands. by Chris Lattner · 18 years ago
  48. 33d5595 Do not emit copies for physical register output if it's not used. by Evan Cheng · 18 years ago
  49. 8409747 Instead of adding copyfromreg's to handle physical definitions. Now isel can by Evan Cheng · 18 years ago
  50. e24f8f1 Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350 by Christopher Lamb · 18 years ago
  51. e7e7d0d Skeleton of post-RA scheduler; doesn't do anything yet. by Dale Johannesen · 18 years ago
  52. 5e2456c If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def. by Evan Cheng · 18 years ago
  53. af825c8 When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value. by Evan Cheng · 18 years ago
  54. 9912628 Change CalculateHeights and CalculateDepths to be non-recursive. by Evan Cheng · 18 years ago
  55. b5bec2b Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration by Dan Gohman · 18 years ago
  56. c01a530 Fix some VC++ warnings. by Jeff Cohen · 18 years ago
  57. a0a26b7 Code clean up. by Lauro Ramos Venancio · 18 years ago
  58. 8334b9f CopyToReg source operand can be a physical register. by Lauro Ramos Venancio · 18 years ago
  59. 95ad943 print target nodes nicely by Chris Lattner · 18 years ago
  60. 5d4a9f7 fix indentation by Chris Lattner · 18 years ago
  61. 0152829 Apply B Scott Michel's patch for PR1184, which improves diagnostics in an by Chris Lattner · 18 years ago
  62. ac9dcb9 For PR1195: by Reid Spencer · 18 years ago
  63. 831e037 switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This by Chris Lattner · 19 years ago
  64. 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 19 years ago
  65. de268f7 Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift(). by Evan Cheng · 19 years ago
  66. f6d039a Remove the DoubleTy special case. by Evan Cheng · 19 years ago
  67. e5530da Compensate for loss of DerivedTypes.h in TargetLowering.h by Reid Spencer · 19 years ago
  68. 489a87c CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg. by Evan Cheng · 19 years ago
  69. 832171c Removing even more <iostream> includes. by Bill Wendling · 19 years ago
  70. ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 19 years ago
  71. c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
  72. 7ce4578 Matches MachineInstr changes. by Evan Cheng · 19 years ago
  73. 3ba433a Add methods to add implicit def use operands to a MI. by Evan Cheng · 19 years ago
  74. 438f7bc Add implicit def / use operands to MachineInstr. by Evan Cheng · 19 years ago
  75. 95f6ede Changes to use operand constraints to process two-address instructions. by Evan Cheng · 19 years ago
  76. efa46ce handle global address constant sdnodes by Chris Lattner · 19 years ago
  77. d42a523 Debug tweak. by Evan Cheng · 19 years ago
  78. d6594ae Added support for machine specific constantpool values. These are useful for by Evan Cheng · 19 years ago
  79. 09e4606 Completely eliminate def&use operands. Now a register operand is EITHER a by Chris Lattner · 19 years ago
  80. 228a18e switch the SUnit pred/succ sets from being std::sets to being smallvectors. by Chris Lattner · 19 years ago
  81. 3b97acd Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed. by Evan Cheng · 19 years ago
  82. 60f0992 Use an enumeration to eliminate data relocations. by Jim Laskey · 19 years ago
  83. 16d42c6 It was pointed out that DEBUG() is only available with -debug. by Jim Laskey · 19 years ago
  84. e37fe9b Ensure that dump calls that are associated with asserts are removed from by Jim Laskey · 19 years ago
  85. 8d3af5e Instructions with variable operands (variable_ops) can have a number required by Evan Cheng · 19 years ago
  86. 4c6f2f9 commuteInstruction() does not always create a new MI! by Evan Cheng · 19 years ago
  87. 16eee25 Eliminate a memory leak. by Evan Cheng · 19 years ago
  88. 21d03f2 lib/Target/Target.td by Evan Cheng · 19 years ago
  89. 9664541 Move function-live-in-handling code from the sdisel code to the scheduler. by Chris Lattner · 19 years ago
  90. 8820ad5 Fixing 2006-05-01-SchedCausingSpills.ll; some clean up by Evan Cheng · 19 years ago
  91. 07000c6 Refactor a bunch of includes so that TargetMachine.h doesn't have to include by Owen Anderson · 19 years ago
  92. 626da3d Duh. That could take a long time. by Evan Cheng · 19 years ago
  93. 13d41b9 Add capability to scheduler to commute nodes for profit. by Evan Cheng · 19 years ago
  94. e165a78 Refactor scheduler code. Move register-reduction list scheduler to a by Evan Cheng · 19 years ago
  95. 8b915b4 Remove and simplify some more machineinstr/machineoperand stuff. by Chris Lattner · 19 years ago
  96. 2d90ac7 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. by Chris Lattner · 19 years ago
  97. ea50fab Remove a bunch more SparcV9 specific stuff by Chris Lattner · 19 years ago
  98. a69571c Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. by Owen Anderson · 19 years ago
  99. 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 19 years ago
  100. 45053fc fix spello by Chris Lattner · 19 years ago