- 97d9903 The internalize pass can be dangerous for LTO. by Bill Wendling · 12 years ago
- 4e53fe8 ARM assembly aliases for add negative immediates using sub. by Jim Grosbach · 12 years ago
- ba9536a Reapply test case in 154038, this time with triple to prevent the backend by Akira Hatanaka · 12 years ago
- 60b35f4 Patch to set is_stmt a little better for prologue lines in a function. by Eric Christopher · 12 years ago
- 740cd65 Don't break the IV update in TLI::SimplifySetCC(). by Jakob Stoklund Olesen · 12 years ago
- 036ebfd Fix accidentally inverted logic from r152803, and make the by Dan Gohman · 12 years ago
- 703bf84 Fix a problem in the target detection for Debian GNU/HURD by Sylvestre Ledru · 12 years ago
- 1d7e8c6 Fix a problem in the target detection for Debian GNU/kFreeBSD by Sylvestre Ledru · 12 years ago
- d7484e5 Treat f16 the same as f80/f128 for the purposes of generating constants during instruction selection. by Owen Anderson · 12 years ago
- 1c01249 Added support for unpredictable ADC/SBC instructions on ARM, and also fixed some corner cases involving the PC register as an operand for these instructions. by Silviu Baranga · 12 years ago
- 82e1bba Added support for handling unpredictable arithmetic instructions on ARM. by Silviu Baranga · 12 years ago
- 940371b BBVectorize: Add the const modifier to the VectorizeConfig because we won't by Hongbin Zheng · 12 years ago
- bef377b Introduce the VectorizeConfig class, with which we can control the behavior by Hongbin Zheng · 12 years ago
- 17dcaf5 An oversight when applying the patches for r150956 and r150957 to a vanilla tree meant I forgot to svn add these testcases. by James Molloy · 12 years ago
- 87825e7 Add the function "vectorizeBasicBlock" which allow users vectorize a by Hongbin Zheng · 12 years ago
- 22378fd ARM assembly aliases for two-operand V[R]SHR instructions. by Jim Grosbach · 12 years ago
- 541b2a4 In MemoryBuffer::getOpenFile() make sure that the buffer is null-terminated if by Argyrios Kyrtzidis · 12 years ago
- b657a90 ARM assembly parsing for 'msr' plain 'cpsr' operand. by Jim Grosbach · 12 years ago
- 9243c4f Pass the right sign to TLI->isLegalICmpImmediate. by Jakob Stoklund Olesen · 12 years ago
- 63246de Do not include multiple -arch options in CPPFLAGS. by Bob Wilson · 12 years ago
- 68f404d Fix -Wnon-virtual-dtor warnings. by Michael J. Spencer · 12 years ago
- 56ce6b3 Reapply 154038 without the failing test. by Akira Hatanaka · 12 years ago
- 657a4e7 Revert r154038. It was causing make check failures. by Owen Anderson · 12 years ago
- ef74ca6 REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case by Pete Cooper · 12 years ago
- e25a2bd Fix a C++11 UDL conflict. by Benjamin Kramer · 12 years ago
- 9751b81 f16 FREM can now be legalized by promoting to f32 by Pete Cooper · 12 years ago
- e825fb3 Fix LowerGlobalAddress to produce instructions with the correct relocation by Akira Hatanaka · 12 years ago
- c75ceb7 Fix LowerJumpTable to produce instructions with the correct relocation by Akira Hatanaka · 12 years ago
- 86a2733 Fix LowerConstantPool to produce instructions with the correct relocation by Akira Hatanaka · 12 years ago
- c5041ca Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr. by Jakob Stoklund Olesen · 12 years ago
- 1487cb3 Remove spurious debug output. by Jakob Stoklund Olesen · 12 years ago
- 03d830e Fix LowerBlockAddress to produce instructions with the correct relocation by Akira Hatanaka · 12 years ago
- 99c8a5a Add testcase for r154007, when a function has the optsize attribute, by Hongbin Zheng · 12 years ago
- 26c8dcc Always compute all the bits in ComputeMaskedBits. by Rafael Espindola · 12 years ago
- 00b73a5 LoopUnrollPass: Use variable "Threshold" instead of "CurrentThreshold" when by Hongbin Zheng · 12 years ago
- a95b4eb Move yaml::Stream's dtor out of line so it can see Scanner's dtor. by Benjamin Kramer · 12 years ago
- 32d1774 Implement DwarfLLVMRegPair::operator< without violating asymmetry. by Benjamin Kramer · 12 years ago
- 58609b7 Convert assert(false) followed by a return to llvm_unreachable by Craig Topper · 12 years ago
- 8d41a1a Remove default case from switch that was already covering all cases. by Craig Topper · 12 years ago
- e5ae51a Removed useless switch for default case when switch was covering all the enum values by Pete Cooper · 12 years ago
- a348fec Fix the install location for the Embedded makefile target. by Bob Wilson · 12 years ago
- c35146b Sorry about that. MSVC seems to accept just about any random string you give it ;/ by Michael J. Spencer · 12 years ago
- d13af63 Remove dead code for installing libLTO when building llvmCore. by Bob Wilson · 12 years ago
- 93210e8 Add YAML parser to Support. by Michael J. Spencer · 12 years ago
- 2ce63c7 Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095> by Pete Cooper · 12 years ago
- dda3a09 Removed one last bad continue statement meant to be removed in r153914. by Pete Cooper · 12 years ago
- 585d580 When building llvmCore, pass the SDKROOT and -arch setting to configure. by Bob Wilson · 12 years ago
- ac07407 Remove a reference to the C backend. by Bob Wilson · 12 years ago
- 9dbb018 Fix an issue in SimplifySetCC() specific to vector comparisons. by Chad Rosier · 12 years ago
- 1895fc9 Set soname for FreeBSD as well. Patch by Bernard Cafarelli! by Anton Korobeynikov · 12 years ago
- fa5b050 Fix thinko check for number of operands to be the one that actually by Eric Christopher · 12 years ago
- d5be48a Matrix simplification in PBQP may push infinite costs onto register options. by Lang Hames · 12 years ago
- 75e3b7f ARMDisassembler: drop bogus dependency on ARMCodeGen by Dylan Noblesmith · 12 years ago
- 70debec Object: drop bogus VMCore dependency by Dylan Noblesmith · 12 years ago
- 5fdf475 The speedup doesn't appear to have been from this, but was an anomaly of my testing machine. by Bill Wendling · 12 years ago
- f563fc3 Reserve space for the eventual filling of the vector. This gives a small speedup. by Bill Wendling · 12 years ago
- 43b32e0 Add an additional testcase which checks ops with multiple users. by Nadav Rotem · 12 years ago
- 9cd5e7a Make PPCCompilationCallbackC function to be static, so there will be no need to issue call via by Anton Korobeynikov · 12 years ago
- 9b1b25f Tidy up spacing in some tablegen outputs. by Craig Topper · 12 years ago
- 769bbfd Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. by Craig Topper · 12 years ago
- 90e7d4f Reformatting. No functionality change. by Bill Wendling · 12 years ago
- cbece8c As Eric pointed out, even a Debug build should be equal. Leave the flag that can turn off comparisons though. by Bill Wendling · 12 years ago
- 9dd16d4 Revert r153924. Delete test/MC/Disassembler/Mips and lib/Target/Mips/Disassembler. by Akira Hatanaka · 12 years ago
- 0236594 Revert r153924. There were buildbot failures. by Akira Hatanaka · 12 years ago
- 885020a MIPS disassembler support. by Akira Hatanaka · 12 years ago
- 5aeda3f Cleanup set_union usage. The same thing but a bit cleaner now. by Andrew Trick · 12 years ago
- f127595 Use std::set_union instead of nasty custom code. by Andrew Trick · 12 years ago
- 6126a1e Add a line number for the scope of the function (starting at the first by Eric Christopher · 12 years ago
- 2e267ae Fixes to r153903. Added missing explanation of behaviour when the VirtRegMap is NULL. Also changed it in this case to just avoid updating the map, but live ranges or intervals will still get updated and created by Pete Cooper · 12 years ago
- 1adc215 Compare the .o files only for release builds. Add an option to bypass the comparison altogether. by Bill Wendling · 12 years ago
- 789d5d8 Moved LiveRangeEdit.h so that it can be called from other parts of the backend, not just libCodeGen by Pete Cooper · 12 years ago
- 1c8cf21 Make dominatedBySlowTreeWalk private and assert cases handled by the caller. by Rafael Espindola · 12 years ago
- e3b23cd Allocate virtual registers in ascending order. by Jakob Stoklund Olesen · 12 years ago
- 8a06af9 Refactored the LiveRangeEdit interface so that MachineFunction, TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead of passed in to each method. by Pete Cooper · 12 years ago
- 3197b44 Add an option to turn off the expensive GVN load PRE part of GVN. by Bill Wendling · 12 years ago
- 29f60f3 Add predicates for checking whether targets have free FNEG and FABS operations, and prevent the DAGCombiner from turning them into bitwise operations if they do. by Owen Anderson · 12 years ago
- be9fe49 During two-address lowering, rescheduling an instruction does not untie by Lang Hames · 12 years ago
- ce16784 No need to run llvm-as. by Rafael Espindola · 12 years ago
- a551a48 Initial 64 bit direct object support. by Akira Hatanaka · 12 years ago
- 70272aa The binutils for the IBM BG/P are too old to support CFI. by Hal Finkel · 12 years ago
- a47406c Add triple support for the IBM BG/P and BG/Q supercomputers. by Hal Finkel · 12 years ago
- 60777d8 Turn on the accelerator tables for Darwin. by Eric Christopher · 12 years ago
- aad9c3f Fast fix for PR12343: http://llvm.org/bugs/show_bug.cgi?id=12343 by Stepan Dyatkovskiy · 12 years ago
- 466958c Implement the SVR4 byval alignment for aggregates. Fixing a FIXME. by Roman Divacky · 12 years ago
- 545b962 Second part for the 153874 one by Silviu Baranga · 12 years ago
- 50ac2e9 Added fix in TableGen instruction decoder generation. The decoder now breaks for every leaf node. by Silviu Baranga · 12 years ago
- 5004e98 Add missing 'd'. by Rafael Espindola · 12 years ago
- 8ba9405 Hack the hack. If we have a situation where an ASM object is defined but isn't by Bill Wendling · 12 years ago
- 9433859 Emit the asm writer's mnemonic table with SequenceToOffsetTable. by Benjamin Kramer · 12 years ago
- c97ef61 Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter. by Benjamin Kramer · 12 years ago
- fab3f7e Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree. by Craig Topper · 12 years ago
- 44b5e6d Optimizing swizzles of complex shuffles may generate additional complex shuffles. by Nadav Rotem · 12 years ago
- 7c0b3c1 Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. by Craig Topper · 12 years ago
- 79e22d8 Fix CXXFLAGS for huge_val.m4. by Eric Christopher · 12 years ago
- 17463b3 Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. by Craig Topper · 12 years ago
- 1fcbca0 It could come about that we parse the inline ASM before we get a potential by Bill Wendling · 12 years ago
- a4bd58b Use SequenceToOffsetTable to generate instruction name table for AsmWriter. by Craig Topper · 12 years ago
- caa2c40 Start cleaning up the InlineCost class. This switches to sentinel values by Chandler Carruth · 12 years ago
- b66e943 Fix some 80-col. violations I introduced with the A2 PPC64 core. by Hal Finkel · 12 years ago
- 19aa2b5 Enable prefetch generation on PPC64. by Hal Finkel · 12 years ago