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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 97f48c39fd158ad1a701002e2d6798c4b4ae4ab8 / lib / Target / ARM / ARMCodeEmitter.cpp
  1. 97f48c3 Encode extend instructions; more clean up. by Evan Cheng · 17 years ago
  2. 12c3a53 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. by Evan Cheng · 17 years ago
  3. d87293c Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. by Evan Cheng · 17 years ago
  4. 9092213 Fix so_imm encoding bug; add support for MOVi2pieces. by Evan Cheng · 17 years ago
  5. fbc9d41 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. by Evan Cheng · 17 years ago
  6. 83b5cf0 Encode pic load / store instructions; fix some encoding bugs. by Evan Cheng · 17 years ago
  7. edda31c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. by Evan Cheng · 17 years ago
  8. 142c15e Debug output tweak. by Evan Cheng · 17 years ago
  9. 25e0478 Handle ARM machine constantpool entries. by Evan Cheng · 17 years ago
  10. 0a4b9dc Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. by Jim Grosbach · 17 years ago
  11. 938b9d8 Use better data structure for ConstPoolId2AddrMap. by Evan Cheng · 17 years ago
  12. ba44df6 Actually make debug output understandable. by Evan Cheng · 17 years ago
  13. eb4ed4b Encode PICADD; some code clean up. by Evan Cheng · 17 years ago
  14. e53a5af I think we got non-machine specific constpool entries covered. by Evan Cheng · 17 years ago
  15. 0f28243 Correct way to handle CONSTPOOL_ENTRY instructions. by Evan Cheng · 17 years ago
  16. bc6d876 Support for constant islands in the ARM JIT. by Jim Grosbach · 17 years ago
  17. 3341262 Encode the conditional execution predicate when JITing. by Jim Grosbach · 17 years ago
  18. 9e729a2 Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly by Jim Grosbach · 17 years ago
  19. 48b828f Indexing off by one resulted in errant encoding of source register for by Jim Grosbach · 17 years ago
  20. 016d34c by Jim Grosbach · 17 years ago
  21. d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
  22. efd30ba Fix typo s/ther/there/ by Jim Grosbach · 17 years ago
  23. 057d0c3 Duh. Default to ARMCC::AL (always). by Evan Cheng · 17 years ago
  24. 7fd7ca4 Fix addrmode1 instruction encodings; fix bx_ret encoding. by Evan Cheng · 17 years ago
  25. 2aa0e64 Fix random abort. by Evan Cheng · 17 years ago
  26. e7de7e3 Typo. by Evan Cheng · 17 years ago
  27. be3034c Rely on instruction format to determine so_reg operand for now. by Evan Cheng · 17 years ago
  28. 05fc966 Revert 56176. All those instruction formats are still needed. by Evan Cheng · 17 years ago
  29. 55375a4 Accidentially flipped the condition. by Evan Cheng · 17 years ago
  30. 42d5ee06 Add debug dumps. by Evan Cheng · 17 years ago
  31. a964b7d Eliminate unnecessary instruction formats. by Evan Cheng · 17 years ago
  32. 49a9f29 Addrmode 1 S bit can be dynamically set. Look for CPSR def. by Evan Cheng · 17 years ago
  33. 5f1db7b Rewrite address mode 1 code emission routines. by Evan Cheng · 17 years ago
  34. ae73dc1 Tidy up several unbeseeming casts from pointer to intptr_t. by Dan Gohman · 17 years ago
  35. 7602e11 Revamp ARM JIT. by Evan Cheng · 17 years ago
  36. 7c1c261 Remove bunch of gcc 4.3-related warnings from Target by Anton Korobeynikov · 17 years ago
  37. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 17 years ago
  38. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
  39. 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
  40. 8aa797a Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
  41. 9a1ceae Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
  42. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  43. 9c1a382 Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly. by Raul Herbster · 18 years ago
  44. 0ff94f7 Initial JIT support for ARM by Raul Fernandes Herbster. by Evan Cheng · 18 years ago
  45. c3dbe70 no email addrs in file headers by Chris Lattner · 18 years ago
  46. 148b6a4 Initial ARM JIT support by Raul Fernandes Herbster. by Evan Cheng · 18 years ago