- 9bb5488 Address review comments. by Benjamin Kramer · 13 years ago
- 98d6d23 SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between. by Benjamin Kramer · 13 years ago
- 1a9a2d0 Update to the new EH scheme. by Bill Wendling · 13 years ago
- 09908c4 Look at only the terminators of the basic block. Also, if we're using the new EH by Bill Wendling · 13 years ago
- c82a61c Initial check in that will auto-upgrade the old EH scheme to the new EH scheme. by Bill Wendling · 13 years ago
- f1a2642 Do the same as r138461. Mark VZEROALL as clobbering all YMM registers by Bruno Cardoso Lopes · 13 years ago
- b210cbf Remove stray fullstop. by Nick Lewycky · 13 years ago
- 6292ece Add support for AVX 256-bit version of MOVDDUP! by Bruno Cardoso Lopes · 13 years ago
- 06ef923 Make isMOVDDUP mask check more strict and update comments! by Bruno Cardoso Lopes · 13 years ago
- 32c371f Constify Comparison by David Greene · 13 years ago
- 9990683 Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed. by Owen Anderson · 13 years ago
- cf847bf Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX. by Benjamin Kramer · 13 years ago
- b9ca512 ARM fix for missing implicit operands on ldmia_ret. by Andrew Trick · 13 years ago
- 51972da whitespace by Andrew Trick · 13 years ago
- 0c49ac0 Explicitly disallow predication in Thumb1 assembly. by Jim Grosbach · 13 years ago
- ebc1db0 Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678. by Craig Topper · 13 years ago
- 113061d Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. by Craig Topper · 13 years ago
- ea03659 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723. by Craig Topper · 13 years ago
- 8b6af8a LSR wants to split the landing pad's critical edge. Let it do it, but use the by Bill Wendling · 13 years ago
- 2df9f8d Initialize member variable. by Benjamin Kramer · 13 years ago
- 07b7f67 Add support for 256-bit versions of VSHUFPD and VSHUFPS. by Bruno Cardoso Lopes · 13 years ago
- e7461c0 Add memory version of SHUFPD to mask decoding! by Bruno Cardoso Lopes · 13 years ago
- 4ba1086 Remove empty directories. by Eli Friedman · 13 years ago
- 76cf779 Update tests to the newest EH syntax. by Bill Wendling · 13 years ago
- 77eaaf0 Hide -global-merge option. by Evan Cheng · 13 years ago
- c5fb9d8 Add feature test for the new exception handling stuff. by Bill Wendling · 13 years ago
- 89d4411 When inserting new instructions, use getFirstInsertionPt instead of by Bill Wendling · 13 years ago
- b8cfe4f Add a command line option to disable global merge pass. by Evan Cheng · 13 years ago
- 0f66026 Remove a out-of-place comment. by Evan Cheng · 13 years ago
- 27831e5 Create a section for non-instructions patterns in the beginning of the by Bruno Cardoso Lopes · 13 years ago
- 9993499 Move code around! by Bruno Cardoso Lopes · 13 years ago
- de79231 Organize UNPCK* patterns, also add remaining for AVX. by Bruno Cardoso Lopes · 13 years ago
- 4cf4778 Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate by Bruno Cardoso Lopes · 13 years ago
- 4724f25 Organize and tidy up MOVDDUP section. Also update comments! by Bruno Cardoso Lopes · 13 years ago
- 6140294 Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the by Bruno Cardoso Lopes · 13 years ago
- 954d5ea Move all PSHUF* patterns close to the PSHUF* definitions. Also be by Bruno Cardoso Lopes · 13 years ago
- af002d8 Move all SHUFP* patterns close to the SHUFP* definitions. Also be by Bruno Cardoso Lopes · 13 years ago
- f440820 Perform more thorough checking of t2IT mask parameters, which fixes all remaining crashers when disassembling the entire 16-bit instruction space. by Owen Anderson · 13 years ago
- f8f90f0 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually. by Eli Friedman · 13 years ago
- 5fbe5e7 Some autoconf tests use module level inline asm to test compiler's handling of by Evan Cheng · 13 years ago
- 070260c Update tests for 138501. by Jim Grosbach · 13 years ago
- b9d3ff8 ARM asm backend initialize isThumbMode based on target triple. by Jim Grosbach · 13 years ago
- 4d23e99 Thumb .n mnemonic qualifiers can be ignored for now. by Jim Grosbach · 13 years ago
- f69c804 Thumb parsing and encoding for SUB (SP minu immediate). by Jim Grosbach · 13 years ago
- 12a1e3b Be careful not to walk off the end of the operand info list while updating VFP predicates. by Owen Anderson · 13 years ago
- 72f39f8 Thumb parsing and encoding support for ADD SP instructions. by Jim Grosbach · 13 years ago
- 4317fe1 Fix whitespace. by Eli Friedman · 13 years ago
- bbc87a3 Basic tests for atomic load and store on x86. by Eli Friedman · 13 years ago
- a4c86ab Skip the landingpad instruction when determining the insertion point. by Bill Wendling · 13 years ago
- 327236c Basic x86 code generation for atomic load and store instructions. by Eli Friedman · 13 years ago
- b05fdd6 Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to the proper by Bill Wendling · 13 years ago
- c264b2f Some minor updates to atomic acquire/release docs in LangRef. by Eli Friedman · 13 years ago
- 4c7c0f2 Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api. by Nadav Rotem · 13 years ago
- df9ce6b When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate. by Jim Grosbach · 13 years ago
- 356e988 Mark VZEROALL as clobbering all YMM registers by Bruno Cardoso Lopes · 13 years ago
- f95aaf9 Add missing explicit writeback operand to tSTMIA_UPD. by Jim Grosbach · 13 years ago
- 3e74d6f Move TargetRegistry and TargetSelect from Target to Support where they belong. by Evan Cheng · 13 years ago
- 605e2b5 Fix a crashing bug in SplitBlock when it is called on a block with no by Rafael Espindola · 13 years ago
- c7e0bb2 Thumb add SP assembly syntax fix. by Jim Grosbach · 13 years ago
- 5b81584 Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. by Jim Grosbach · 13 years ago
- e234d02 Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate. by Owen Anderson · 13 years ago
- ddaa513 Port over more encoding tests to decoding tests. by Owen Anderson · 13 years ago
- ee61d67 Tidy up. Trailing whitespace. by Jim Grosbach · 13 years ago
- 8f9c5cc Add Uses=[SP] to call instructions. This fixes a miscompilation with a by Richard Osborne · 13 years ago
- 13894fa Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. by Craig Topper · 13 years ago
- 3ae96d6 Add the sentinal "no handle" value to the ResumeInst. by Bill Wendling · 13 years ago
- fc8713f Don't replace *all* uses with the new stuff. by Bill Wendling · 13 years ago
- cfcccef Look at the end of the entry block for an invoke. by Bill Wendling · 13 years ago
- d8b7dd5 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit by Bruno Cardoso Lopes · 13 years ago
- 4477d69 A landingpad instruction is neither folded nor dead. by Bill Wendling · 13 years ago
- 5aa29a0 Move ARM frame-unwinding EHABI handling a touch earlier. by Jim Grosbach · 13 years ago
- d04f6a5 [SU]XT[BH] are only available on ARMv6 and up. by Jim Grosbach · 13 years ago
- 7ced776 Add some useful accessors to c++ api that appear to be missing from the c api by Nate Begeman · 13 years ago
- 7801136 Some refactoring so TargetRegistry.h no longer has to include any files from MC. by Evan Cheng · 13 years ago
- acc8f2d Revert "Address Duncan's CR request:" by Eric Christopher · 13 years ago
- 99e84e0 Thumb parsing and encoding for WFE, WFI and YIELD. by Jim Grosbach · 13 years ago
- 3284db5 Thumb parsing and encoding for UXTB and UXTH. by Jim Grosbach · 13 years ago
- 010bebc Thumb parsing and encoding for TST. by Jim Grosbach · 13 years ago
- 4b6658d Thumb parsing and encoding for SXTB and SXTH. by Jim Grosbach · 13 years ago
- ec8b866 Thumb parsing and encoding for SVC. by Jim Grosbach · 13 years ago
- 414b023 Thumb parsing and encoding for SUB. by Jim Grosbach · 13 years ago
- 1dafa70 Fix 80 col violations. by Evan Cheng · 13 years ago
- 726ebd6 PerformSubCombine to work on integers larger than i128. Fixes a crasher. by Nick Lewycky · 13 years ago
- 743c0fa Thumb parsing and encoding for STRH. by Jim Grosbach · 13 years ago
- b1aa80b Thread safety: Adding in an option for variadic expr* array of arguments by Caitlin Sadowski · 13 years ago
- aec3a61 Thumb parsing and encoding for STRB. by Jim Grosbach · 13 years ago
- 803b1aa Thumb parsing and encoding for tSTRspi. by Jim Grosbach · 13 years ago
- 4c821d8 Thumb parsing and encoding for STR. by Jim Grosbach · 13 years ago
- 3395fe1 Fix an example in the documentation. Patch by Sanjoy Das! by Rafael Espindola · 13 years ago
- 1e84f19 Thumb parsing and encoding for STM. by Jim Grosbach · 13 years ago
- aa875f8 Factor low reg checking into a helper function. by Jim Grosbach · 13 years ago
- 46634f5 Fix a typo in the test from the previous commit. by Nadav Rotem · 13 years ago
- 82265a2 Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. by Owen Anderson · 13 years ago
- 20a05be Address Duncan's CR request: by Nadav Rotem · 13 years ago
- 6153a03 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions. by Owen Anderson · 13 years ago
- cefe4c9 Clean up Thumb load/store multiple definitions. by Jim Grosbach · 13 years ago
- e732cb0 Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. by Owen Anderson · 13 years ago
- b4ff969 Port more assemble tests over to disassembly tests. by Owen Anderson · 13 years ago
- 38fb2db This patch adds support of le32 pseudo-cpu that stands for generic by Ivan Krasin · 13 years ago
- 691a488 Fix fpimmm->fpimm typo. by Eric Christopher · 13 years ago