1. 9d4ebc0 Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after by Bob Wilson · 15 years ago
  2. 765c4d9 Add support for the 'lane' modifier on vdup operands by Jim Grosbach · 15 years ago
  3. 06f264e Remember VLDMQ. by Jakob Stoklund Olesen · 15 years ago
  4. 31bbc51 Add missing break. by Jakob Stoklund Olesen · 15 years ago
  5. 6039697 Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register by Jim Grosbach · 15 years ago
  6. a4c3c8f move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper by Jim Grosbach · 15 years ago
  7. f1c3eb3 simplify getRegisterNumbering(). Remove the unused isSPVFP argument and by Jim Grosbach · 15 years ago
  8. 7e2c04f Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. Check by Jim Grosbach · 15 years ago
  9. d8be410 Reduce dependencies in the ARM MC instruction printer. by Jim Grosbach · 15 years ago
  10. 8b7fa19 Fix spelling typo. by Jim Grosbach · 15 years ago
  11. 754578b Factor out basic enums and hleper functions from ARM.h for cleaner sharing by Jim Grosbach · 15 years ago
  12. 26edbcb Add support for floating point immediates to MC instruction printing. ARM by Jim Grosbach · 15 years ago
  13. d64816a Recognize VST1q64Pseudo and VSTMQ as stack slot stores. by Jakob Stoklund Olesen · 15 years ago
  14. 3a95182 Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem by Bob Wilson · 15 years ago
  15. 7602993 the darwin9-powerpc buildbot keeps consistently crashing, by Gabor Greif · 15 years ago
  16. 3432785 Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't be by Jakob Stoklund Olesen · 15 years ago
  17. 064312d Spelling fix. by Bob Wilson · 15 years ago
  18. 168f382 Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and by Bob Wilson · 15 years ago
  19. 05ae0c6 Reapply r113875 with additional cleanups. by Jim Grosbach · 15 years ago
  20. bb3e5da Emit libcalls for SDIV, this requires some call infrastructure by Eric Christopher · 15 years ago
  21. 6841939 revert 113875 momentarilly. Need to fix the MC disassembler to handle the by Jim Grosbach · 15 years ago
  22. 15d7898 trailing whitespace cleanup by Jim Grosbach · 15 years ago
  23. 308f64a an attempt to salvage the darwin9-powerpc buildbot, which could be miscompiling this line by Gabor Greif · 15 years ago
  24. fe12555 The register specified for a dregpair is the corresponding Q register, so to by Jim Grosbach · 15 years ago
  25. f7d10f5 set isCompare for another three Thumb1 instructions by Gabor Greif · 15 years ago
  26. 5b46d62 Add predicate and 's' bit operands to PICADD instruction lowering. by Jim Grosbach · 15 years ago
  27. fe3ac08 Avoid warnings. by Bob Wilson · 15 years ago
  28. f3f0952 fix comment typo by Jim Grosbach · 15 years ago
  29. 9d84fb3 Make NEON ld/st pseudo instruction classes take the instruction itinerary as by Bob Wilson · 15 years ago
  30. 007248b set comparable for a bunch of Thumb instructions by Gabor Greif · 15 years ago
  31. 1685caf Don't ignore the CPSR implicit def when lowering a MachineInstruction to an MCInst. by Jim Grosbach · 15 years ago
  32. 9854f19 Clarify comment by Jim Grosbach · 15 years ago
  33. de90bfd Eliminate a 'tst' that immediately follows an 'and' by Gabor Greif · 15 years ago
  34. 23da0b2 Fix QOpcode assignment to Opc. by Eric Christopher · 15 years ago
  35. 3a210e2 Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally." by Michael J. Spencer · 15 years ago
  36. bd916c5 Convert some VTBL and VTBX instructions to use pseudo instructions prior to by Bob Wilson · 15 years ago
  37. 8466fa1 Switch all the NEON vld-lane and vst-lane instructions over to the new by Bob Wilson · 15 years ago
  38. fc16a89 trailing whitespace by Jim Grosbach · 15 years ago
  39. cbf8a98 fix the asmparser so that the target is responsible for skipping to by Chris Lattner · 15 years ago
  40. a655686 Rename ConvertToSetZeroFlag to something more general. by Bill Wendling · 15 years ago
  41. 3665661 No need to recompute the SrcReg and CmpValue. by Bill Wendling · 15 years ago
  42. 92ad57f Move some of the decision logic for converting an instruction into one that sets by Bill Wendling · 15 years ago
  43. d10cd7b Start sketching out ARM fast-isel calls. by Eric Christopher · 15 years ago
  44. 44bff90 For consistency. by Eric Christopher · 15 years ago
  45. 09b2171 Newline at end of file. by Eric Christopher · 15 years ago
  46. 6f2ccef Split out some of the calling convention bits so that they can be by Eric Christopher · 15 years ago
  47. 220e240 Modify the comparison optimizations in the peephole optimizer to update the by Bill Wendling · 15 years ago
  48. 51f5b67 Add a missing case to duplicateCPV() for LSDA constants. Add a FIXME. rdar://8302157 by Jim Grosbach · 15 years ago
  49. 4e9c939 CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally. by Michael J. Spencer · 15 years ago
  50. 979927a Calculate the number of VLDM/VSTM registers by subtracting the number of by Bob Wilson · 15 years ago
  51. c8714bb Reword since this may not be a bug but intended behavior. by Bill Wendling · 15 years ago
  52. efe7d9a Fix merging base-updates for VLDM/VSTM: Before I switched these instructions by Bob Wilson · 15 years ago
  53. 3ef1c87 Teach if-converter to be more careful with predicating instructions that would by Evan Cheng · 15 years ago
  54. 920a208 Fix build error. by Eric Christopher · 15 years ago
  55. db12b2b Update comments, reorganize some code, rename variables to be by Eric Christopher · 15 years ago
  56. 238bb16 64-bit fp loads can come straight out of the constant pool, not as by Eric Christopher · 15 years ago
  57. 9ee4ce2 SIToFP and FPToSI conversions work only on fp-reg to fp-reg. Move by Eric Christopher · 15 years ago
  58. aa3ace1 New "move to fp reg" routine. Use it. by Eric Christopher · 15 years ago
  59. ef2fdd2 "Strike that, reverse it." -- Mr. Wonka. by Eric Christopher · 15 years ago
  60. ce07b54 Add FPTrunc, fix some bugs where I forgot to update the value map. by Eric Christopher · 15 years ago
  61. 9a04049 Basic FP->Int, Int->FP conversions. by Eric Christopher · 15 years ago
  62. 5f54ce3 For each instruction itinerary class, specify the number of micro-ops each by Evan Cheng · 15 years ago
  63. 0f1e945 Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from by Bob Wilson · 15 years ago
  64. ac1a19e Nuke whitespace and fix some indenting. by Eric Christopher · 15 years ago
  65. bd6bf08 Handle 64-bit floating point binops as well. by Eric Christopher · 15 years ago
  66. bc39b82 Basic 32-bit FP operations. by Eric Christopher · 15 years ago
  67. 19d644d For double-spaced VLD3/VLD4 instructions, copy the explicit super-register use by Bob Wilson · 15 years ago
  68. 4620360 Handle float->double extension. by Eric Christopher · 15 years ago
  69. 9ed58df Rewrite TargetMaterializeConstant splitting it out into two functions by Eric Christopher · 15 years ago
  70. 63569c9 Simplify copying over operands from pseudo NEON load/store instructions. by Bob Wilson · 15 years ago
  71. 656edcf Clean up a comment. by Bob Wilson · 15 years ago
  72. d43393a Very basic compare support. by Eric Christopher · 15 years ago
  73. a88d857 Delete dead code. by Eric Christopher · 15 years ago
  74. 7602acb Fix LDM_RET schedule itinery. by Evan Cheng · 15 years ago
  75. 30b6633 Make the loads/stores match the type we really want to store. by Eric Christopher · 15 years ago
  76. d0bd76b Re-enable usage of the ARM base pointer. r113394 fixed the known failures. by Jim Grosbach · 15 years ago
  77. 951f699 Fix errant fall-throughs causing the base pointer to be used when the frame by Jim Grosbach · 15 years ago
  78. 845c575 Rewrite TargetMaterializeConstant. by Eric Christopher · 15 years ago
  79. 30c93e1 Be more careful about when to do dynamic stack realignment. Since we have an by Jim Grosbach · 15 years ago
  80. 6b53834 Add missing assert by Jim Grosbach · 15 years ago
  81. 34e5314 change the MC "ParseInstruction" interface to make it the by Chris Lattner · 15 years ago
  82. 186acea ARM/Disassembler: Fix definitions incompatible(unsigned and uint32_t) to Cygwin-1.5, following up to r113255. by NAKAMURA Takumi · 15 years ago
  83. 4725ca7 remove trailing whitespace by Jim Grosbach · 15 years ago
  84. 707fb64 remove obsolete comment by Jim Grosbach · 15 years ago
  85. e1e6d18 disable for the moment while tracking down a few Thumb2-O0 failure that look by Jim Grosbach · 15 years ago
  86. 8b95dfe woops. need to update a test along with this. by Jim Grosbach · 15 years ago
  87. 8a076eb disable temporarily while sorting out a few test failures in Thumb2-O0 tests. by Jim Grosbach · 15 years ago
  88. 0cfcf93 correct spill code to properly determine if dynamic stack realignment is by Jim Grosbach · 15 years ago
  89. 72db182 VFP/NEON load/store multiple instructions are addrmode4, not 5. by Jim Grosbach · 15 years ago
  90. 447e7ac To shrink a t2LDM instruction to the 16-bit wide tLDM instruction, the base by Jim Grosbach · 15 years ago
  91. e2f70d1 grammar tweak by Jim Grosbach · 15 years ago
  92. 6cd5db4 hopefully fix a problem building on cygwin-1.5 by Chris Lattner · 15 years ago
  93. ce4a335 in the case where an instruction only has one implementation by Chris Lattner · 15 years ago
  94. 79ed3f7 change MatchInstructionImpl to return an enum instead of bool. by Chris Lattner · 15 years ago
  95. 0692ee6 have AsmMatcherEmitter.cpp produce the hunk of code that gets included by Chris Lattner · 15 years ago
  96. 979b061 remove some dead code. t2addrmode_imm8s4 is never used in a by Chris Lattner · 15 years ago
  97. 252b491 cleanups. by Chris Lattner · 15 years ago
  98. 17aa680 zap dead code. by Chris Lattner · 15 years ago
  99. 65482b1 Re-apply r112883: by Jim Grosbach · 15 years ago
  100. fc63300 Check the local frame alignment for determining whether dynamic stack by Jim Grosbach · 15 years ago