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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / a25e5dbcc2371352386a01e3c1b8e76dd890272b / lib
  1. a25e5db Extend the AliasAnalysis::pointsToConstantMemory interface to allow it by Dan Gohman · 15 years ago
  2. c80cbf2 Delete getIntrinsicModRefBehavior. Clients can just use the normal by Dan Gohman · 15 years ago
  3. 3c97f7a Make FunctionAttrs use AliasAnalysis::getModRefBehavior, now that it by Dan Gohman · 15 years ago
  4. 431c794a Teach BasicAliasAnalysis::getModRefBehavior(const Function *F) by Dan Gohman · 15 years ago
  5. df65963 Add generating function declaration for PTX by Che-Liang Chiou · 15 years ago
  6. 3278c42 Add physical register counting functions by Che-Liang Chiou · 15 years ago
  7. d77f2a4 Add a dummy PTXMCAsmStreamer class by Che-Liang Chiou · 15 years ago
  8. 4faf7c7 Set default flags for .rodata. by Rafael Espindola · 15 years ago
  9. 6da24ca Add registry hook for assembly text output by Che-Liang Chiou · 15 years ago
  10. 5991487 Make RegList an ASM operand so that TableGen will generate code for it. This is by Bill Wendling · 15 years ago
  11. b32e784 Revert. by Bill Wendling · 15 years ago
  12. 92826de Add simplification of floating point comparisons with the result by Duncan Sands · 15 years ago
  13. 1ac7c99 Fix a README item: when doing a comparison with the result by Duncan Sands · 15 years ago
  14. e25e1ef Speed up AddSectionToTheEnd. It was walking all fragments in all sections. by Rafael Espindola · 15 years ago
  15. e8399c6 In this context, a reglist is a reg. by Bill Wendling · 15 years ago
  16. 13302ec Fix memory leak in StringRef::edit_distance(). 'Allocated' could be leaked on an early return. by Ted Kremenek · 15 years ago
  17. 9e07a14 Add method for checking if a path is a symbolic link. by Rafael Espindola · 15 years ago
  18. 187d833 Relax dwarf line fragments. This fixes a crash in the included testcase. by Rafael Espindola · 15 years ago
  19. 689cf3c implement aliases for div/idiv that have an explicit A register operand, by Chris Lattner · 15 years ago
  20. e717610 Add support for parsing register lists. We can't use a bitfield to keep track of by Bill Wendling · 15 years ago
  21. 04a75ab add aliases for movs between seg registers and mem. There are multiple by Chris Lattner · 15 years ago
  22. d5b2f1a move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file. by Chris Lattner · 15 years ago
  23. 8155e5b Return the base register of a register list for the "getReg()" method. This is by Bill Wendling · 15 years ago
  24. 1767151 work-in-progress by Chris Lattner · 15 years ago
  25. 146018f General cleanup: by Bill Wendling · 15 years ago
  26. db28788 go to great lengths to work around a GAS bug my previous patch exposed: by Chris Lattner · 15 years ago
  27. 8c24b0c rework the rotate-by-1 instructions to be defined like the by Chris Lattner · 15 years ago
  28. 235705b change the fp comparison instructions to not have %st0 explicitly by Chris Lattner · 15 years ago
  29. 3af0e7d move the plethora of fp stack aliases to the .td file. by Chris Lattner · 15 years ago
  30. 90fd797 add (and document) the ability for alias results to have by Chris Lattner · 15 years ago
  31. 8d5acb7 Add a RegList (register list) object to ARMOperand. It will be used soon to hold by Bill Wendling · 15 years ago
  32. 98c870f generalize alias support to allow the result of an alias to by Chris Lattner · 15 years ago
  33. dea546b move fnstsw aliases to .td file, fix typo by Chris Lattner · 15 years ago
  34. 7e925cc move in/out aliases to the .td files. by Chris Lattner · 15 years ago
  35. 9c1dbc6 move sldt, imul, and movabsq aliases from c++ to .td file. by Chris Lattner · 15 years ago
  36. fb7000f correct suffix matching to search for s/l/t suffixes on by Chris Lattner · 15 years ago
  37. f788854 Prune includes. by Benjamin Kramer · 15 years ago
  38. 12f40e9 Fix grammar. by Bill Wendling · 15 years ago
  39. a60f157 Fix grammar. by Bill Wendling · 15 years ago
  40. d68fd9c MatchRegisterName() returns 0 if it can't match the register. by Bill Wendling · 15 years ago
  41. 1d6a265 Use TryParseRegister() instead of MatchRegisterName(). The former returns -1 by Bill Wendling · 15 years ago
  42. 019e378 Add a note. by Benjamin Kramer · 15 years ago
  43. 5bde734 fix a bug where we had an implicit assumption that the by Chris Lattner · 15 years ago
  44. 5e262bc Make sure we have movw on the target before using it. by Eric Christopher · 15 years ago
  45. 8caa290 move the lcall/ljmp aliases to the .td file. by Chris Lattner · 15 years ago
  46. 02ff6ba move the "movsd -> movsl" alias to the .td files, by Chris Lattner · 15 years ago
  47. 4140985 fix some bugs in the alias support, unblocking changing of "clr" aliases by Chris Lattner · 15 years ago
  48. 662e5a3 Reimplement BuildResultOperands to be in terms of the result instruction's by Chris Lattner · 15 years ago
  49. 2a30170 Hook up the '.code {16|32}' directive to the streamer. by Jim Grosbach · 15 years ago
  50. ba21957 Add '.code 32' assembler directive to MC streamers. by Jim Grosbach · 15 years ago
  51. 642fc9c Hook up the '.thumb_func' directive to the streamer. by Jim Grosbach · 15 years ago
  52. 83c4018 Fix past-o. by Jim Grosbach · 15 years ago
  53. ce79299 MC'ize the '.code 16' and '.thumb_func' ARM directives. by Jim Grosbach · 15 years ago
  54. 36fa3ea Disallow the certain NEON modified-immediate forms when generating vorr or vbic. by Owen Anderson · 15 years ago
  55. 8da0a57 MC'ize simple ARMConstantValue entry emission (with a FIXME). by Jim Grosbach · 15 years ago
  56. f798569 Put class into an anonymous namespace. by Benjamin Kramer · 15 years ago
  57. 080c092 Add codegen and encoding support for the immediate form of vbic. by Owen Anderson · 15 years ago
  58. a55661b Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work by Jim Grosbach · 15 years ago
  59. c9d1439 Allow targets to specify the MachO CPUType/CPUSubtype information. by Jim Grosbach · 15 years ago
  60. 41ed3ca syntaxunified directive is a no-op for MachO writing. by Jim Grosbach · 15 years ago
  61. 6d87bca Add FIXME. by Jim Grosbach · 15 years ago
  62. 69300a2 When passing a parameter using the 'byval' mechanism, inline code needs to be used by Duncan Sands · 15 years ago
  63. f8254d64 CrashRecoveryContext: Add RunSafelyOnThread helper function. by Daniel Dunbar · 15 years ago
  64. 1e92ec6 When passing a huge parameter using the byval mechanism, a long by Duncan Sands · 15 years ago
  65. 42c9b25 Use arrays instead of constant-sized SmallVectors. by Benjamin Kramer · 15 years ago
  66. 7387345 Add 118023 back, but with proper spelling for .uleb128/.sleb128. by Rafael Espindola · 15 years ago
  67. 537ebea Revert previous patch. Some targets don't support uleb and say they do :-( by Rafael Espindola · 15 years ago
  68. 40f6514 MCize. by Rafael Espindola · 15 years ago
  69. 35fcd65 Introduce DIBuilder. It is intended to be a front-end friendly interface to emit debuggging information entries in LLVM IR. by Devang Patel · 15 years ago
  70. 1e96bab In the calling convention logic, ValVT is always a legal type, by Duncan Sands · 15 years ago
  71. 416941d Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli. by Evan Cheng · 15 years ago
  72. ea8e206 System: Add llvm_execute_on_thread, which does what it says. by Daniel Dunbar · 15 years ago
  73. 7093326 Add ARM fixup info for load/store label references. Probably will need a bit of by Jim Grosbach · 15 years ago
  74. 2f46f1f Add encoding for VSTR. by Bill Wendling · 15 years ago
  75. 8c42f48 Disable fancy splitting during spilling unless -extra-spiller-splits is given. by Jakob Stoklund Olesen · 15 years ago
  76. 806e80e Teach ARM Target to use the tblgen support for generating an MC'ized by Jim Grosbach · 15 years ago
  77. 60f4870 Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. by Owen Anderson · 15 years ago
  78. d966817 Add support for code generation of the one register with immediate form of vorr. by Owen Anderson · 15 years ago
  79. 35b2de0 trailing whitespace by Jim Grosbach · 15 years ago
  80. d81f17a Just return undef for invalid masks or elts, and since we're doing that, by Eric Christopher · 15 years ago
  81. 964bc25 Let RegAllocBasic require MachineDominators - they are already available and by Jakob Stoklund Olesen · 15 years ago
  82. 376dcbd Tag debug output as regalloc by Jakob Stoklund Olesen · 15 years ago
  83. e5b13cf Optimize generated code for integer materialization a bit. by Eric Christopher · 15 years ago
  84. 7a25825 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead, by Owen Anderson · 15 years ago
  85. d168cef Add codegen patterns for VST1-lane instructions. Radar 8599955. by Bob Wilson · 15 years ago
  86. 3468c2e Check for extractelement with a variable operand for the element number. by Bob Wilson · 15 years ago
  87. d66f2b7 Rename FindExecutable to PrependMainExecutablePath. by Mikhail Glushenkov · 15 years ago
  88. 391f5bc Rename PointsToLocalMemory to PointsToLocalOrConstantMemory to make by Duncan Sands · 15 years ago
  89. cdfad36 Simplify uses of MVT and EVT. An MVT can be compared directly by Duncan Sands · 15 years ago
  90. 1440e8b Inside the calling convention logic LocVT is always a simple by Duncan Sands · 15 years ago
  91. caebdd4 If we have an undef mask our Elt will be -1 for our access, handle by Eric Christopher · 15 years ago
  92. dfed19f Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. by Evan Cheng · 15 years ago
  93. bc7deb0 Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. by Evan Cheng · 15 years ago
  94. cdbbec4 Put the PC encoding in the correct bit position. by Bill Wendling · 15 years ago
  95. 000cf70 Invert these branches by default, it makes assembly comparisons a little by Eric Christopher · 15 years ago
  96. 92b5a2e The MC code couldn't handle ARM LDR instructions with negative offsets: by Bill Wendling · 15 years ago
  97. 394d629 Fix DAGCombiner to avoid going into an infinite loop when it by Dan Gohman · 15 years ago
  98. 2915eb4 Remove unused function. by Jim Grosbach · 15 years ago
  99. 0a2287b Remove the no longer used 'Modifier' optional operand to the ARM by Jim Grosbach · 15 years ago
  100. 496e2b2 Remove unused function. by Jim Grosbach · 15 years ago