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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / a46cd97818ac6fa336b093adecf2006fb041ca1c / lib / CodeGen / RegAllocLinearScan.cpp
  1. adf9c8b Avoid modifying the OneClassForEachPhysReg map while iterating over it. by Bob Wilson · 15 years ago
  2. c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  3. 19bb35d Zap the last two -Wself-assign warnings in llvm. by Jakob Stoklund Olesen · 15 years ago
  4. 8e68c38 Change all self assignments X=X to (void)X, so that we can turn on a by Jeffrey Yasskin · 15 years ago
  5. 42acf06 Emit DBG_VALUE instructions from LiveDebugVariables. by Jakob Stoklund Olesen · 15 years ago
  6. e7fbdcd Don't attempt trivial coalescing for sub-register copies. by Jakob Stoklund Olesen · 15 years ago
  7. fd900a2 Print out the register class of the current interval. by Jakob Stoklund Olesen · 15 years ago
  8. e93198a Hook up AliasAnalysis in InlineSpiller. This is used for rematerializing by Jakob Stoklund Olesen · 15 years ago
  9. d68f458 Make MachineDominators available for SplitEditor. We are going to need it for by Jakob Stoklund Olesen · 15 years ago
  10. 2d17293 Make the spiller responsible for updating the LiveStacks analysis. by Jakob Stoklund Olesen · 15 years ago
  11. 081c34b Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which by Owen Anderson · 15 years ago
  12. 2ab36d3 Begin adding static dependence information to passes, which will allow us to by Owen Anderson · 15 years ago
  13. ce665bd Now with fewer extraneous semicolons! by Owen Anderson · 15 years ago
  14. 6e2968c Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL. by Lang Hames · 15 years ago
  15. 188da25 Tweak to ignoring reserved regs. The allocator was occasionally still looking by Jim Grosbach · 15 years ago
  16. 662fb77 tidy up trailing whitespace and an 80 column violation. by Jim Grosbach · 15 years ago
  17. 5a4cbea cleanup per feedback. use a helper function for getting the first non-reserved by Jim Grosbach · 15 years ago
  18. 067a648 The register allocator shouldn't consider allocating reserved registers. by Jim Grosbach · 15 years ago
  19. 0a2b2a1 Clean up the Spiller.h interface. by Jakob Stoklund Olesen · 15 years ago
  20. 90c579d Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  21. 1f74590 Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  22. 9ccaf53 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  23. 977fa34 Grammar by Jim Grosbach · 15 years ago
  24. d13db2c Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). by Owen Anderson · 15 years ago
  25. f2c6e36 Change the createSpiller interface to take a MachineFunctionPass argument. by Jakob Stoklund Olesen · 15 years ago
  26. 9529a1c Spillers may alter MachineLoopInfo when breaking critical edges, so make it by Jakob Stoklund Olesen · 15 years ago
  27. 04c528a Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway. by Jakob Stoklund Olesen · 15 years ago
  28. 0bc25f4 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  29. cd075a4 80-col fixup. by Eric Christopher · 15 years ago
  30. 67674e2 Don't return a std::vector in the Spiller interface, but take a reference to a by Jakob Stoklund Olesen · 15 years ago
  31. 87565c1 improve portability to systems that don't have powf/modf (e.g. solaris 9) by Chris Lattner · 15 years ago
  32. 75361b6 rename llvm::llvm_report_error -> llvm::report_fatal_error by Chris Lattner · 15 years ago
  33. 66df66c Remove dead code by Jakob Stoklund Olesen · 15 years ago
  34. 3727776 Change errs() to dbgs(). by David Greene · 16 years ago
  35. cabdd74 Fix a bunch of little errors that Clang complains about when its being pedantic by Douglas Gregor · 16 years ago
  36. a937f22 Moved spill weight calculation out of SimpleRegisterCoalescing and into its own pass: CalculateSpillWeights. by Lang Hames · 16 years ago
  37. cf97036 Also attempt trivial coalescing for live intervals that end in a copy. by Jakob Stoklund Olesen · 16 years ago
  38. 6194569 Added a new "splitting" spiller. by Lang Hames · 16 years ago
  39. dc492e0 Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail. by Bill Wendling · 16 years ago
  40. 6b74e50 Also attempt trivial coalescing for live intervals that end in a copy. by Jakob Stoklund Olesen · 16 years ago
  41. a96fc2f by David Greene · 16 years ago
  42. 8783e40 Removed references to LiveStacks from Spiller.* . They're no longer needed. by Lang Hames · 16 years ago
  43. feb5bfb by David Greene · 16 years ago
  44. 7cfd336 by David Greene · 16 years ago
  45. 835ca07 Added a new Spiller implementation which wraps LiveIntervals::addIntervalsForSpills. by Lang Hames · 16 years ago
  46. 233a60e The Indexes Patch. by Lang Hames · 16 years ago
  47. f5a86f4 Remove includes of Support/Compiler.h that are no longer needed after the by Nick Lewycky · 16 years ago
  48. 6726b6d Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. by Nick Lewycky · 16 years ago
  49. cc3b065 Renamed MachineInstrIndex to LiveIndex. by Lang Hames · 16 years ago
  50. 2bf0649 Simplify a few more uses of reg_iterator. by Dan Gohman · 16 years ago
  51. 8651125 Replaces uses of unsigned for indexes in LiveInterval and VNInfo with by Lang Hames · 16 years ago
  52. cfa6ec9 Kill off more cerr/cout uses and prune includes a bit. by Benjamin Kramer · 16 years ago
  53. c3115a0 Convert DOUT to DEBUG(errs()...). by Bill Wendling · 16 years ago
  54. 845012e Use setPreservesAll and setPreservesCFG in CodeGen passes. by Dan Gohman · 16 years ago
  55. ce63ffb More migration to raw_ostream, the water has dried up around the iostream hole. by Daniel Dunbar · 16 years ago
  56. c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
  57. fc1b75f Removed some junk code that snuck in to an earlier commit. by Lang Hames · 16 years ago
  58. 7d696d8 Convert more assert(0)+abort() -> LLVM_UNREACHABLE, by Torok Edwin · 16 years ago
  59. 2578ba2 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. by Evan Cheng · 16 years ago
  60. 4784f1f Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. by Evan Cheng · 16 years ago
  61. f9f1da1 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. by Evan Cheng · 16 years ago
  62. 857c4e0 VNInfo cleanup. by Lang Hames · 16 years ago
  63. 358dec5 Part 1. by Evan Cheng · 16 years ago
  64. 90f95f8 Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them. by Evan Cheng · 16 years ago
  65. 073e7e5 RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets. by Evan Cheng · 16 years ago
  66. 550aacb A value defined by an implicit_def can be liven to a use BB. This is unfortunate. But register allocator still has to add it to the live-in set of the use BB. by Evan Cheng · 16 years ago
  67. e5eb6d2 Remove a #include of <iostream>. by Dan Gohman · 16 years ago
  68. fcad172 Removed more testing code that snuck in earlier. by Lang Hames · 16 years ago
  69. 7ccf4a0 Fixed warning, removed some temporary validation code that snuck in during my last commit. by Lang Hames · 16 years ago
  70. f41538d Update to in-place spilling framework. Includes live interval scaling and trivial rewriter. by Lang Hames · 16 years ago
  71. e2b201b New Spiller interface and trivial implementation. by Lang Hames · 16 years ago
  72. eca24fb Teach TransferDeadness to delete truly dead instructions if they do not produce side effects. by Evan Cheng · 16 years ago
  73. 87e3bca Renamed Spiller classes (plus uses and related files) to VirtRegRewriter. by Lang Hames · 16 years ago
  74. c781a24 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. by Evan Cheng · 16 years ago
  75. 5b16cd2 Code clean up. Bye bye PhysRegTracker. by Evan Cheng · 16 years ago
  76. 96f3fd9 spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixed_ IntervalPtrs. Reset them. by Evan Cheng · 16 years ago
  77. 1c2f6da Determine allocation 'preference' with right register class. I haven't seen this changing codegen so no test case. by Evan Cheng · 16 years ago
  78. 5b69eba It has finally happened. Spiller is now using live interval info. by Evan Cheng · 16 years ago
  79. c4f718a - Remove an arbitrary spill weight tweak that should not have been there. by Evan Cheng · 16 years ago
  80. 206d185 Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. by Evan Cheng · 16 years ago
  81. 5d088fe Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. by Evan Cheng · 16 years ago
  82. 2824a65 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 16 years ago
  83. 49c8aa0 Convert VirtRegMap to a MachineFunctionPass. by Owen Anderson · 16 years ago
  84. 1ed5b71 Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. by Owen Anderson · 16 years ago
  85. 04ee5a1 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  86. d0deec2 Make linear scan's trivial coalescer slightly more aggressive. by Evan Cheng · 17 years ago
  87. d68a076 Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 17 years ago
  88. 5489893 - More pre-split fixes: spill slot live interval computation bug; restore point bug. by Evan Cheng · 17 years ago
  89. d0e32c5 - Rewrite code that update register live interval that's split. by Evan Cheng · 17 years ago
  90. f5cd4f0 Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. by Evan Cheng · 17 years ago
  91. b8cab92 Fix command-line option printing to print two spaces where needed, by Dan Gohman · 17 years ago
  92. 95dad83 Add an option to enable StrongPHIElimination, for ease of testing. by Owen Anderson · 17 years ago
  93. dc37786 Re-apply 56835 along with header file changes. by Evan Cheng · 17 years ago
  94. 46292be Revert commit 56835 since it breaks the build. by Duncan Sands · 17 years ago
  95. d41474d If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. by Evan Cheng · 17 years ago
  96. 86b49f8 Next round of earlyclobber handling. Approach the by Dale Johannesen · 17 years ago
  97. 34d8f75 Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 17 years ago
  98. 5e8d9de Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 17 years ago
  99. d6bd733 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 17 years ago
  100. fa48f94 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 17 years ago