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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / a46f35d3d65425af5eaaaf906fca240a33d6c362 / test / CodeGen / X86 / avx-arith.ll
  1. f68b214 Fixed vsqrt.ss intrinsic usage - order of input operands was wrong. by Elena Demikhovsky · 13 years ago
  2. 13894fa Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. by Craig Topper · 13 years ago
  3. b33ea56 Rename and tidy up tests by Bruno Cardoso Lopes · 13 years ago[Renamed (90%) from test/CodeGen/X86/avx-256-arith.ll]
  4. 53c9588 We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases. by Bruno Cardoso Lopes · 13 years ago