1. ac226bb Target/X86: Add explicit Win64 and System V/x86-64 calling conventions. by Charles Davis · 11 years ago
  2. e54885a AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all by Stephen Lin · 11 years ago
  3. 842b1bd X86: Add comment. by Jim Grosbach · 11 years ago
  4. cc64dc6 X86 fast-isel: Avoid explicit AH subreg reference for [SU]Rem. by Jim Grosbach · 11 years ago
  5. 4010110 Reuse %rax after calling __chkstk on win64 by Nico Rieck · 11 years ago
  6. 63e7778 Revert "Proper va_arg/va_copy lowering on win64" by Nico Rieck · 11 years ago
  7. d56e7e1 Revert "Reuse %rax after calling __chkstk on win64" by Nico Rieck · 11 years ago
  8. 01f8d57 Reuse %rax after calling __chkstk on win64 by Nico Rieck · 11 years ago
  9. 2b52880 Proper va_arg/va_copy lowering on win64 by Nico Rieck · 11 years ago
  10. f349a6e Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. by Jakob Stoklund Olesen · 11 years ago
  11. c938229 Revert r185595-185596 which broke buildbots. by Jakob Stoklund Olesen · 11 years ago
  12. 6220422 Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. by Jakob Stoklund Olesen · 11 years ago
  13. 365ef0b Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size. by Craig Topper · 11 years ago
  14. 716a94f by Ulrich Weigand · 11 years ago
  15. a35ae96 PR16493: DebugInfo with TLS on PPC crashing due to invalid relocation by David Blaikie · 11 years ago
  16. 27bf6e9 X86: POP*rmm: move address operand to (ins) from (outs). by Ahmed Bougacha · 11 years ago
  17. a5545bc Fix an off-by-one error. Also make the code a little more explicit in what it by Chad Rosier · 11 years ago
  18. c084c09 Integrate Assembler: Support X86_64_DTPOFF64 relocations by David Blaikie · 11 years ago
  19. e6dc376 Get rid of the unused class member. by Nadav Rotem · 11 years ago
  20. 16d36a5 CostModel: improve the cost model for load/store of non power-of-two types such as <3 x float>, which are popular in graphics. by Nadav Rotem · 11 years ago
  21. 872bb36 Don't cast away constness. by Benjamin Kramer · 11 years ago
  22. 87070fe Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector. by Elena Demikhovsky · 11 years ago
  23. 34eb240 X86 cost model: Vectorizing integer division is a bad idea by Arnold Schwaighofer · 11 years ago
  24. b2b5dc6 Revert "Temporarily enable MI-Sched on X86." by Andrew Trick · 11 years ago
  25. 98a9b72 Temporarily enable MI-Sched on X86. by Andrew Trick · 11 years ago
  26. 0f2eec6 Add MI-Sched support for x86 macro fusion. by Andrew Trick · 11 years ago
  27. 5b3fca5 The getRegForInlineAsmConstraint function should only accept MVT value types. by Chad Rosier · 11 years ago
  28. 1948910 DebugInfo: Don't lose unreferenced non-trivial by-value parameters by David Blaikie · 11 years ago
  29. 9b5575d Fix IMULX machine model. Multiple def operands require multiple SchedWrites. by Andrew Trick · 11 years ago
  30. 46d7de7 Update the X86 disassembler to use xacquire and xrelease when appropriate. by Kevin Enderby · 11 years ago
  31. ba54bca Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change. by Bill Wendling · 11 years ago
  32. ea44281 Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change. by Bill Wendling · 11 years ago
  33. ef2d9e3 Fix 80 col violation. by Nadav Rotem · 11 years ago
  34. 23306de Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. by Stefanus Du Toit · 11 years ago
  35. 99cb622 Use pointers to the MCAsmInfo and MCRegInfo. by Bill Wendling · 11 years ago
  36. 0187e7a DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs by David Blaikie · 11 years ago
  37. a3d82ce Support BufferSize on ProcResGroup for unified MOp schedulers. by Andrew Trick · 11 years ago
  38. a5ce5f3 Update machine models. Specify buffer sizes for OOO processors. by Andrew Trick · 11 years ago
  39. b86a0cd Machine Model: Add MicroOpBufferSize and resource BufferSize. by Andrew Trick · 11 years ago
  40. d25ec76 X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equivalent. by Benjamin Kramer · 11 years ago
  41. 19b30d5 X86: Make the cmov aliases work with intel syntax too. by Benjamin Kramer · 11 years ago
  42. 8fdb53d Fix gcc -flto build, by adding LLVM_ATTRIBUTE_USED to by Patrik Hagglund · 11 years ago
  43. 2a2bf79 Correct the def registers for the 8bit x86 divide instructions to by Eric Christopher · 11 years ago
  44. 3ce2a98 Use the Copy we defined above here. by Eric Christopher · 11 years ago
  45. e5609f3 X86: Stop LEA64_32r doing unspeakable things to its arguments. by Tim Northover · 11 years ago
  46. 40e071c Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff. by Elena Demikhovsky · 11 years ago
  47. a5e5ba6 Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  48. 1ce4985 Remove unused c'tor. by Bill Wendling · 11 years ago
  49. 6a2e7ac Cache the TargetLowering info object as a pointer. by Bill Wendling · 11 years ago
  50. 9a508ef [PATCH] Fix VGATHER* operand constraints by Michael Liao · 11 years ago
  51. 6c1202c Handle relocations that don't point to symbols. by Rafael Espindola · 11 years ago
  52. b8ce457 X86: sub_xmm registers are 128 bits wide. by Ahmed Bougacha · 11 years ago
  53. 3ba14fa Revert r183069: "TMP: LEA64_32r fixing" by Tim Northover · 11 years ago
  54. 4d3ace4 TMP: LEA64_32r fixing by Tim Northover · 11 years ago
  55. 85c622d X86: change MOV64ri64i32 into MOV32ri64 by Tim Northover · 11 years ago
  56. 3443108 Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it by Eric Christopher · 11 years ago
  57. bed2308 Add a way to define the bit range covered by a SubRegIndex. by Ahmed Bougacha · 11 years ago
  58. 43887bf X86: change MOV64ri64i32 into MOV32ri64 by Tim Northover · 11 years ago
  59. 15983b8 X86: use sub-register sequences for MOV*r0 operations by Tim Northover · 11 years ago
  60. da0416b X86: change zext moves to use sub-register infrastructure. by Tim Northover · 11 years ago
  61. 6e0b2a0 Order CALLSEQ_START and CALLSEQ_END nodes. by Andrew Trick · 11 years ago
  62. 8df6f4b X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS. by Ahmed Bougacha · 11 years ago
  63. 8ed5506 Don't assume the registers will be enumerated sequentially. by Chad Rosier · 11 years ago
  64. dd0fb01 Track IR ordering of SelectionDAG nodes 3/4. by Andrew Trick · 11 years ago
  65. ac6d9be Track IR ordering of SelectionDAG nodes 2/4. by Andrew Trick · 11 years ago
  66. de7cbbf Follow up of the introduction of MCSymbolizer. by Quentin Colombet · 11 years ago
  67. c6af243 Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. by Michael J. Spencer · 11 years ago
  68. 2c94d0f Add MCSymbolizer for symbolic/annotated disassembly. by Ahmed Bougacha · 11 years ago
  69. 62c320a Simplify logic now that r182490 is in place. No functional change intended. by Chad Rosier · 11 years ago
  70. 23d1d5e X86: Fix a bug in EltsFromConsecutiveLoads. We can't generate new loads without chains. by Nadav Rotem · 11 years ago
  71. 60ef6c9 X86: When expanding PCMPGTQ to PCMPGTD we always want to compare the lower halves as unsigned. by Benjamin Kramer · 11 years ago
  72. 3b4b536 X86: Remove test instructions proceeding shift by immediate instructions by David Majnemer · 11 years ago
  73. 0c61b6f removed commented lines by Elena Demikhovsky · 11 years ago
  74. f8cd1ee Removed SSEPacked domain from all forms (AVX, SSE, signed, unsigned) scalar compare instructions, like COMISS, COMISD. by Elena Demikhovsky · 11 years ago
  75. f106d8b X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the smaller type. by Benjamin Kramer · 11 years ago
  76. 8a55c2e X86: Bad peephole interaction between adc, MOV32r0 by David Majnemer · 11 years ago
  77. 225ed70 Add LLVMContext argument to getSetCCResultType by Matt Arsenault · 11 years ago
  78. a0de26c X86: Make shuffle -> shift conversion more aggressive about undefs. by Benjamin Kramer · 11 years ago
  79. 6b67ffd Remove addFrameMove. by Rafael Espindola · 11 years ago
  80. 0ed9f1f Delete dead code. by Rafael Espindola · 11 years ago
  81. 377b227 Delete dead code. by Rafael Espindola · 11 years ago
  82. 17585dc X86: Remove redundant test instructions by David Majnemer · 11 years ago
  83. f276c70 Reapply "Subtract isn't commutative, fix this for MMX psub." with by Eric Christopher · 11 years ago
  84. edf0dda Temporarily revert "Subtract isn't commutative, fix this for MMX psub." by Eric Christopher · 11 years ago
  85. 304d73c Subtract isn't commutative, fix this for MMX psub. by Eric Christopher · 11 years ago
  86. b99052c Suppress GCC compiler warnings in release builds about variables that are only by Duncan Sands · 11 years ago
  87. 4a97170 Remove the MachineMove class. by Rafael Espindola · 11 years ago
  88. d84ccfa Change getFrameMoves to return a const reference. by Rafael Espindola · 11 years ago
  89. ffc49cb [ms-inline asm] Fix a crasher when we fail on a direct match. by Chad Rosier · 11 years ago
  90. 6e53180 Remove unused argument. by Rafael Espindola · 11 years ago
  91. a70d02f [x86AsmParser] It's valid to stop parsing an operand at an immediate. by Chad Rosier · 11 years ago
  92. edfef3b Generate a compact unwind encoding in the face of a stack alignment push. by Bill Wendling · 11 years ago
  93. 1f4b796 Simplify the code a bit. by Bill Wendling · 11 years ago
  94. acccd2e Corrected Atom latencies for SSE SQRT instructions. by Preston Gurd · 11 years ago
  95. c208c43 Re-enable AVX detection on x64 platforms. by Michael Kuperstein · 11 years ago
  96. 526f3ed Remove a recently redundant transform from X86ISelLowering. by David Majnemer · 11 years ago
  97. 5c332db Add ArrayRef constructor from None, and do the cleanups that this constructor enables by Dmitri Gribenko · 11 years ago
  98. 76be9bf whitespace by Nadav Rotem · 11 years ago
  99. 0fb6523 Fix an odd comment. by Nadav Rotem · 11 years ago
  100. b9548d8 X86: Add target description for btver2; make autodetection logic aware of AVX. by Benjamin Kramer · 11 years ago