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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / ad9ad7c827b585c018288c89d611d8c97d8d2e7d / lib
  1. ad9ad7c Fix a bug in our autoupgrade support: in an argument list to a function by Chris Lattner · 15 years ago
  2. 0c8f7dc do not rely on callee being operand 0 by Gabor Greif · 15 years ago
  3. 25cb0d7 by Devang Patel · 15 years ago
  4. 42bf74b CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. by Evan Cheng · 15 years ago
  5. 7db860d Don't print global names twice with -asm-verbose. by Evan Cheng · 15 years ago
  6. e8e4921 Fix PR3874 by restoring a condition I removed, but making it more by Chris Lattner · 15 years ago
  7. 86bda41 Do not ignore DW_TAG_class_type! by Devang Patel · 15 years ago
  8. 569a7f0 oops, I intended to remove this, not comment it out. Thanks Duncan! by Chris Lattner · 15 years ago
  9. 78a5bd5 Fix PR3845: Avoid stale MachineInstruction pointer reference. by Evan Cheng · 15 years ago
  10. f73e319 simplify logic and get rid of the assumption that operand 0 is the callee by Gabor Greif · 15 years ago
  11. a0e6969 canonicalize inttoptr and ptrtoint instructions which cast pointers by Chris Lattner · 15 years ago
  12. 1f8c564 fix one more fp80 case (used only by Interpreter) by Dale Johannesen · 15 years ago
  13. 4f9797d two changes: by Chris Lattner · 15 years ago
  14. e330ae5 Change JIT for different layout of fp80. by Dale Johannesen · 15 years ago
  15. e2f7bf8 more tidying: name the components of PhysReg in the case when by Chris Lattner · 15 years ago
  16. b3b4484 Tidy a bit more. by Chris Lattner · 15 years ago
  17. fc9d161 simplify this code a bit now that "allocation to a vreg class" can never fail. by Chris Lattner · 15 years ago
  18. a96dc14 I was convinced that it's ok to allow a second i8 return value by Dan Gohman · 15 years ago
  19. 8f4aa33 Minor compile-time optimization; don't bother checking by Dan Gohman · 15 years ago
  20. 002b44f Add a pre-pass to the burr-list scheduler which makes adjustments to by Dan Gohman · 15 years ago
  21. f1c0ae9 Do not emit comments unless -asm-verbose. by Evan Cheng · 15 years ago
  22. 16581bf Use a SmallPtrSet instead of std::set. by Dale Johannesen · 15 years ago
  23. 5d088fe Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. by Evan Cheng · 15 years ago
  24. 1b25cb2 Fix internal representation of fp80 to be the by Dale Johannesen · 15 years ago
  25. fa9afef When unfolding a load during scheduling, the new operator node has by Dan Gohman · 15 years ago
  26. 2824a65 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 15 years ago
  27. 8cccf0e Don't set SUnit::hasPhysRegDefs to true unless the defs are by Dan Gohman · 15 years ago
  28. a5c8ae2 Fix canClobberPhysRegDefs to check all SDNodes grouped together by Dan Gohman · 15 years ago
  29. 3974667 Add a new bit to SUnit to record whether a node has implicit physreg by Dan Gohman · 15 years ago
  30. f871ccb Now that errs() is properly non-buffered, there's no need to by Dan Gohman · 15 years ago
  31. 2ba682c LoopVR is not CFGOnly. by Dan Gohman · 15 years ago
  32. a9d71e1 Enhance LiveValues to work on PHI operands. by Dan Gohman · 15 years ago
  33. 2004eb6 Correct some comments. Operand numbers start at 0. by Dan Gohman · 15 years ago
  34. fb11288 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. by Evan Cheng · 15 years ago
  35. 7d6d4b3 Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86 by Evan Cheng · 15 years ago
  36. a8bd27f fix a bug Alexei Svitkine pointed out. by Chris Lattner · 15 years ago
  37. eab5cb3 When we restore signal handlers, restore them back to what they by Chris Lattner · 15 years ago
  38. 1c4d8a0 factorize signal registration, part of PR3848. by Chris Lattner · 15 years ago
  39. 3aff0a6 Fix a grammaro in a comment that Bill noticed. by Dan Gohman · 15 years ago
  40. 82f8415 Add comments explaining why there's only one register for i8 return values. by Dan Gohman · 15 years ago
  41. 64da940 Factorize out a concept - no functionality change. by Duncan Sands · 15 years ago
  42. 8c7f24a add a fastpath to ConstantExpr::getBitCast to handle the case when an obviously by Chris Lattner · 15 years ago
  43. bdfbb74 Removed AFGR32 register class Handle odd registers allocation in FGR32. by Bruno Cardoso Lopes · 15 years ago
  44. 2a14c52 Fix a few more indentation problems and an 80-column violation. by Bob Wilson · 15 years ago
  45. 2dc4f54 No functional changes. Fix indentation and whitespace only. by Bob Wilson · 15 years ago
  46. 344c7c5 Fix instcombine to not introduce undefined shifts when merging two by Chris Lattner · 15 years ago
  47. ab6b226 Don't load values out of global constants with weak by Duncan Sands · 15 years ago
  48. db95fa1 Simplify this code; use a while instead of an if and a do-while. by Dan Gohman · 15 years ago
  49. 697cbbf For inline asm output operand that matches an input. Encode the input operand index in the high bits. by Evan Cheng · 15 years ago
  50. e9d81f0 Fixed comment for libcalls. by Sanjiv Gupta · 15 years ago
  51. 91520ea Fixed build warnings for unused variables. by Sanjiv Gupta · 15 years ago
  52. 6b830e6 Reformatting. Inserted code comments. Cleaned interfaces. by Sanjiv Gupta · 15 years ago
  53. b169426 Fixed the comment. No functionality change. by Sanjiv Gupta · 15 years ago
  54. 8fc2d0e Apply the patch requested in PR3846. by Chris Lattner · 15 years ago
  55. bc65ca8 Added option to enable generating less precise mad (multiply addition) by Mon P Wang · 15 years ago
  56. 654c98c The last use in a block that doesn't have successors by Dan Gohman · 15 years ago
  57. 48fe635 Fix the Win32 VS2008 build: by Sebastian Redl · 15 years ago
  58. a24752f Added MachineInstr::isRegTiedToDefOperand to check for two-addressness. by Evan Cheng · 15 years ago
  59. 1f67ce4 Clear the cached cost when removing a function in by Dale Johannesen · 15 years ago
  60. 3751f56 Add a liveness analysis pass for LLVM IR values. This computes by Dan Gohman · 15 years ago
  61. f33b110 Fix comment typo. by Dale Johannesen · 15 years ago
  62. f4978e2 This pass keeps a map of Instructions to Rank numbers, by Dale Johannesen · 15 years ago
  63. 5e6345b Fix PEI to not walk off the start of a block when an updated instruction by Chris Lattner · 15 years ago
  64. bf5836b Fix comment typo. by Duncan Sands · 15 years ago
  65. 0423483 Fix a couple glaring whitespace issues. This file isn't internally consistent by Nick Lewycky · 15 years ago
  66. 9c0f146 Remove strange extra semicolons. by Nick Lewycky · 15 years ago
  67. 7cee817 Add support to tablegen for naming the nodes themselves, not just the operands, by Nate Begeman · 15 years ago
  68. b53db4f Added support for Mips O32 Calling Convention by Bruno Cardoso Lopes · 15 years ago
  69. a5affdc aha, DAE does have to think about PHI nodes. Many thanks to "Dr Evil" (aka Duncan) by Chris Lattner · 15 years ago
  70. b44b366 Fix PR3826 - InstComb assert with vector shift, by not calling ComputeNumSignBits on a vector. by Chris Lattner · 15 years ago
  71. f023b54 add an assertion to make it clear that PHI nodes are not allowed. by Chris Lattner · 15 years ago
  72. b0c4199 Explicitly check for StoreInst, do not lose the chance to delete by Zhou Sheng · 15 years ago
  73. 16767c6 Revert my previous change on Local.cpp, instead, fix the bug on scalarrepl. by Zhou Sheng · 15 years ago
  74. df95a2f Fix a bug. If I->use_empty(), this method should return false. by Zhou Sheng · 15 years ago
  75. aa9df0b Added missing support for widening when splitting an unary op (PR3683) by Mon P Wang · 15 years ago
  76. ff81ebf Disable the "call to immediate" optimization on x86-64. It is by Chris Lattner · 15 years ago
  77. bda0765 Fix PR3807 by inserting 'insertelement' instructions in the normal dest of by Chris Lattner · 15 years ago
  78. b7e64ac LSR shouldn't ever try to hack on integer IV's larger than 64-bits. Right now by Chris Lattner · 15 years ago
  79. 152932b Don't force promotion of return arguments on the callee. by Rafael Espindola · 15 years ago
  80. b372c11 Add BUILTIN_EXPECT Support/Compiler macro. by Daniel Dunbar · 15 years ago
  81. 0b18e59 Fix codegen to compute the size of an allocation by multiplying the by Chris Lattner · 15 years ago
  82. 46d232d Remove a condition which is always true. by Chris Lattner · 15 years ago
  83. a82d3f7 CellSPU: Revert inadvertent mis-fix of fneg. by Scott Michel · 15 years ago
  84. 12a9dc8 r66870 missed this out. by Sanjiv Gupta · 15 years ago
  85. e14ad72 typo by Gabor Greif · 15 years ago
  86. a5fec0d Reapply r67049, with the test adjusted for darwin by Duncan Sands · 15 years ago
  87. 93b7415 Fix a problem with DAGCombine where we were building an illegal build by Mon P Wang · 15 years ago
  88. 9626447 Recognize bswapl as bswap too. by Dan Gohman · 15 years ago
  89. d735666 Recognize "bswapq" as an alternate spelling for the bswap instruction. by Dan Gohman · 15 years ago
  90. 262541b raw_ostream: Put all exceptional conditions in raw_ostream::write by Daniel Dunbar · 15 years ago
  91. e47b008 Spiller may unfold load / mod / store instructions as an optimization when the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded. by Evan Cheng · 15 years ago
  92. 7ea02ff CellSPU: by Scott Michel · 15 years ago
  93. d17d74b raw_ostream: Rework implementation of unbuffered streams so outputting by Daniel Dunbar · 15 years ago
  94. 6b23339 Fix a debug info dependency in jump threading. by Dale Johannesen · 15 years ago
  95. 89a66a9 raw_ostream: Replace flush_impl with write_impl, which takes data to by Daniel Dunbar · 15 years ago
  96. cf2a2c6 raw_ostream: Lift out flush_nonempty. by Daniel Dunbar · 15 years ago
  97. b451a0c Make raw_ostream::operator<<(const void *) fast; it doesn't matter but by Daniel Dunbar · 15 years ago
  98. de75d7f Add slow path for single character write, and use exclusively for by Daniel Dunbar · 15 years ago
  99. db14d63 --- Reverse-merging (from foreign repository) r67049 into '.': by Bill Wendling · 15 years ago
  100. dfec24c Tweak the fix for PR3784: be less sensitive about just by Duncan Sands · 15 years ago