- af0e272 Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction. by Devang Patel · 16 years ago
- 540b05d In Thumb1, the register scavenger is not always able to use an emergency by Jim Grosbach · 16 years ago
- 01a76ce Remove explicit enum integer values. They don't appear to be needed, and by Dan Gohman · 16 years ago
- 21313bc Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP by Dan Gohman · 16 years ago
- cf0fe8d strength reduce a ton of type equality tests to check the typeid (Through by Chris Lattner · 16 years ago
- 916ac5b Add a comment to describe letters used in multiclass name suffixes. by Bob Wilson · 16 years ago
- 8f07b9e Fix encoding problem for VMLS instruction. by Bob Wilson · 16 years ago
- 048e36f getFunctionAlignment should return log2 alignment. by Evan Cheng · 16 years ago
- 8925979 Forgot about ARM::tPUSH. It also has a new writeback operand. by Evan Cheng · 16 years ago
- 62a1b5d Move load / store multiple before post-alloc scheduling. by Evan Cheng · 16 years ago
- 9843a93 Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. by David Goodwin · 16 years ago
- 471850a Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. by David Goodwin · 16 years ago
- 10469f8 ARM::tPOP and tPOP_RET each has an extra writeback operand now. by Evan Cheng · 16 years ago
- 0d92f5f Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple, by Evan Cheng · 16 years ago
- 7c043d7 Update ARM JIT emitter to account for ld/st multiple changes. by Evan Cheng · 16 years ago
- d20d658 Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions. by Evan Cheng · 16 years ago
- b0fdedb Use MachineInstr as an processDebugLoc() argument. by Devang Patel · 16 years ago
- 29e0669 Use OutStreamer.SwitchSection instead of writing out textual section directives. by Bob Wilson · 16 years ago
- 812209a Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this by Bob Wilson · 16 years ago
- c4c39fa Fix a comment typo. by Bob Wilson · 16 years ago
- b6e4742 The AsmPrinter base class contains a DwarfWriter member, so there's no need by Bob Wilson · 16 years ago
- 460c482 Clarify comment phrasing. by Jim Grosbach · 16 years ago
- 792e1f6 Add a option which would move ld/st multiple pass before post-alloc scheduling. by Evan Cheng · 16 years ago
- d1a5ca6 When checking whether we need to reserve a register for the scavenger, by Jim Grosbach · 16 years ago
- c732adf Add "isBarrier = 1" to return instructions. by Jim Grosbach · 16 years ago
- 0fb3468 For Darwin, emit all the text section directives together before the dwarf by Bob Wilson · 16 years ago
- 0dad89f Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. by David Goodwin · 16 years ago
- 17487ba minor cleanup and add clarifying comment by Jim Grosbach · 16 years ago
- 5ccdd10 Remove std::string uses from DebugInfo interface. by Devang Patel · 16 years ago
- fa1be5d Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat. by Evan Cheng · 16 years ago
- ec9eef4 Adjust processFunctionBeforeCalleeSavedScan() to correctly reserve a stack by Jim Grosbach · 16 years ago
- fd84711 Fix Thumb2 IT block pass bug. t2MOVi32imm may not be the start of a IT block. by Evan Cheng · 16 years ago
- 26207e5 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the by Jakob Stoklund Olesen · 16 years ago
- 522ce97 Pass the optimization level when constructing the ARM instruction selector. by Bob Wilson · 16 years ago
- 5adb66a Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo by Evan Cheng · 16 years ago
- b0d8d78 Fix thinko in my recent movt commit: it's not safe to remat movt, since it has input reg argument. by Anton Korobeynikov · 16 years ago
- 6a2fa32 Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. by Anton Korobeynikov · 16 years ago
- ae03af2 LBRX no longer has an explicit SrcValueSDNode operand, so the type by Dan Gohman · 16 years ago
- 8ff95de Use explicit structs instead of std::pair to map callee saved regs to spill slots. by Tilmann Scheller · 16 years ago
- e298ab2 Enable pre-regalloc load / store multiple pass for Thumb2. by Evan Cheng · 16 years ago
- 72c158f Really remove this option. by Evan Cheng · 16 years ago
- 8981572 Remove a couple of unused command line options. by Evan Cheng · 16 years ago
- 8f05c10 Add comment. by Evan Cheng · 16 years ago
- d1c37f5 Regenerate by Anton Korobeynikov · 16 years ago
- eef490f Code clean up and prepare for Thumb2 support. No functionality changes. by Evan Cheng · 16 years ago
- c76909a Improve MachineMemOperand handling. by Dan Gohman · 16 years ago
- 602b0c8 Rename getTargetNode to getMachineNode, for consistency with the by Dan Gohman · 16 years ago
- 658ea60 Finish scheduling itineraries for NEON. by David Goodwin · 16 years ago
- c8ce2d4 Add some comments to clarify things that I discovered this week. by Bob Wilson · 16 years ago
- 0035f9c pr4926: ARM requires the stack pointer to be aligned, even for leaf functions. by Bob Wilson · 16 years ago
- 6acaaa8 Don't try to use pre-indexed addressing with sthbrx/stwbrx by Dan Gohman · 16 years ago
- 3d6cb88 Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving by Jim Grosbach · 16 years ago
- fe03dbe unconditionally request MMI by Chris Lattner · 16 years ago
- 1f52895 Make the end-of-itinerary mark explicit. Some cleanup. by David Goodwin · 16 years ago
- 127221f Checkpoint NEON scheduling itineraries. by David Goodwin · 16 years ago
- 4e918b2 Use getStoreSize() instead of getStoreSizeInBits()/8. by Dan Gohman · 16 years ago
- 8a55ce4 Rename several variables from EVT to more descriptive names, now that EVT by Dan Gohman · 16 years ago
- 959b002 Remove BlackfinRegisterInfo::getFrameIndexOffset since it is the same as the by Bob Wilson · 16 years ago
- 48e1935 ARM does not support offset folding (yet). Disable it for now. by Anton Korobeynikov · 16 years ago
- 00133a7 Fix X86's unfoldMemoryOperand to properly handle MachineMemOperands. by Dan Gohman · 16 years ago
- b2bb7db Add Cortex-A8 VFP model. by David Goodwin · 16 years ago
- 4a0b3e1 Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-pool by Dan Gohman · 16 years ago
- 670e539 Recognize SSE min and max opportunities in even more cases. by Dan Gohman · 16 years ago
- b29ff97 Fix the offset values for these memoperands. For frame objects, the by Dan Gohman · 16 years ago
- faa6adf add a note by Chris Lattner · 16 years ago
- 003de66 Register the MachineModuleInfo for the ARM JIT, and update JITDwarfEmitter to by Daniel Dunbar · 16 years ago
- 93c6c77 one case handled, expanded another testcase inline. by Chris Lattner · 16 years ago
- 2763217 Implement the JIT side of the GDB JIT debugging interface. To enable this by Reid Kleckner · 16 years ago
- c1491f3 update an entry, delete an entry which has been fixed. by Chris Lattner · 16 years ago
- 711bb91 --- Reverse-merging r82282 into '.': by Bill Wendling · 16 years ago
- 7057641 remove a temporary hack. by Chris Lattner · 16 years ago
- 0dc32ea rename X86ATTAsmPrinter.cpp -> X86AsmPrinter.cpp likewise the .h file. by Chris Lattner · 16 years ago
- d4db0fc move target registry stuff to X86ATTAsmPrinter.cpp by Chris Lattner · 16 years ago
- 547a685 simplify this now that createX86CodePrinterPass is trivial by Chris Lattner · 16 years ago
- 3859638 rename X86ATTAsmPrinter class -> X86AsmPrinter by Chris Lattner · 16 years ago
- 71c7ace remove the asmstring, it is now dead. Improve comment. by Chris Lattner · 16 years ago
- 149cbc2 Peer through zext and sext to eliminate them when it is safe to do so. by Nick Lewycky · 16 years ago
- b3c8547 kill off printPICLabel now, it's specialness is handled by by Chris Lattner · 16 years ago
- ed13cd2 delete X86IntelAsmPrinter! Now -x86-asm-syntax just switches by Chris Lattner · 16 years ago
- e895c61 Add an intel syntax MCInstPrinter implementation. You can now by Chris Lattner · 16 years ago
- 67c6b6e split random COFF asmprinter state out to X86COFFMachineModuleInfo.h. by Chris Lattner · 16 years ago
- 8d5a831 Still one more thing wrong here... by Bill Wendling · 16 years ago
- a279bc3 Tabs -> spaces, and remove trailing whitespace. by Daniel Dunbar · 16 years ago
- 5511ffd Here's fun! It turns out that these filter functions can be internal. If they're by Bill Wendling · 16 years ago
- 68a77ab Revert r82274. It's causing failures in the CINT2006 benchmarks. by Bill Wendling · 16 years ago
- 431f775 Fix funky comments. by Evan Cheng · 16 years ago
- ce31910 Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks. by Evan Cheng · 16 years ago
- a15de00 Fix a typo in an assertion message. by Bob Wilson · 16 years ago
- 296ab7e It's inefficient to have place the exception tables (which contain the LSDA) by Bill Wendling · 16 years ago
- fb2e752 Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes. by Evan Cheng · 16 years ago
- 558b79a Fix cmake build, which has a different -I that by Shantonu Sen · 16 years ago
- 228252f Make a new X8632_MachoTargetObjectFile TLOF implementation whose by Chris Lattner · 16 years ago
- 8dffc81 Model the carry bit on ppc32. Without this we could by Dale Johannesen · 16 years ago
- e220c4b Add support for using the FLAGS result of or, xor, and and instructions by Dan Gohman · 16 years ago
- a2dc282 Added RCL and RCR (rotate left and right with a by Sean Callanan · 16 years ago
- ad2b6fc This file can need access to the X86 instruction enums when the table exceeds 32-bits. by Chris Lattner · 16 years ago
- c6f729e Allow symbols to start from the digit if target requests it. This allows, e.g. pinning by Anton Korobeynikov · 16 years ago
- 8609c7c pass machinemoduleinfo down into getSymbolForDwarfGlobalReference, by Chris Lattner · 16 years ago
- 9a86f10 Added the LODS (load byte into register, usually by Sean Callanan · 16 years ago
- 358f1ef Added the LAR (load segment access rights) by Sean Callanan · 16 years ago