1. af7b4fb Remove the Type::getNumElements() method, which is only called in 4 places, by Chris Lattner · 13 years ago
  2. 0f193b8 Use the right method to get the # elements in a CDS. by Chris Lattner · 13 years ago
  3. a57a36a NEON VLD4(all lanes) assembly parsing and encoding. by Jim Grosbach · 13 years ago
  4. 6cd6a68 Tidy up. Rename VLD4DUP patterns for consistency. by Jim Grosbach · 13 years ago
  5. 5e59f7e NEON VLD3(all lanes) assembly parsing and encoding. by Jim Grosbach · 13 years ago
  6. d36f5af Set correct <def,undef> flags when lowering REG_SEQUENCE. by Jakob Stoklund Olesen · 13 years ago
  7. 1ce6a36 Use the standard MachineFunction::print() after SlotIndexes. by Jakob Stoklund Olesen · 13 years ago
  8. 25dae8f Sign-extend 32-bit integer arguments when they are passed in 64-bit registers, by Akira Hatanaka · 13 years ago
  9. 08067b2 Pass CCState by reference. by Akira Hatanaka · 13 years ago
  10. e6e4b3a Pattern for f32 to i64 conversion. by Akira Hatanaka · 13 years ago
  11. c389af9 ARM Darwin symbol ref differences w/o subsection-via-symbols. by Jim Grosbach · 13 years ago
  12. 3b96e1f Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax. by Devang Patel · 13 years ago
  13. 5387f2e 64-bit sign extension in register instructions. by Akira Hatanaka · 13 years ago
  14. 7f64823 Sink assert-only variables into the asserts by Matt Beaumont-Gay · 13 years ago
  15. 0307b9a [asan] enable asan only for the functions that have Attribute::AddressSafety by Kostya Serebryany · 13 years ago
  16. 88a54de NEON VST4(one lane) assembly parsing and encoding. by Jim Grosbach · 13 years ago
  17. 4f8dc7b Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. by Owen Anderson · 13 years ago
  18. e983a13 NEON VLD4(one lane) assembly parsing and encoding. by Jim Grosbach · 13 years ago
  19. 10c6fdc Fix old doxygen comment. by Jakob Stoklund Olesen · 13 years ago
  20. 1ac2060 NEON Two-operand assembly aliases for VSRA. by Jim Grosbach · 13 years ago
  21. 5e497d3 NEON Two-operand assembly aliases for VSLI. by Jim Grosbach · 13 years ago
  22. d8ee0cc NEON Two-operand assembly aliases for VSRI. by Jim Grosbach · 13 years ago
  23. 78d13e1 NEON add correct predicates for some asm aliases. by Jim Grosbach · 13 years ago
  24. bec2d03 basic instcombine support for CDS. by Chris Lattner · 13 years ago
  25. 29cc6cb C++, CBE, and TLOF support for ConstantDataSequential by Chris Lattner · 13 years ago
  26. 3210060 Rearrange argument order of ::get methods so that LLVMContext comes first, by Chris Lattner · 13 years ago
  27. 28d7e71 ZERO_EXTEND operation is optimized for AVX. by Elena Demikhovsky · 13 years ago
  28. 1ee0ecf add more support for ConstantDataSequential by Chris Lattner · 13 years ago
  29. 53fa1ae An option to selectively enable part of ARM EHABI support. by Evgeniy Stepanov · 13 years ago
  30. e697b4f Bit pack DIE structures better. by Benjamin Kramer · 13 years ago
  31. 8a69834 Remove generation of DW_AT_sibling. Nothing as far as I can tell uses it. by Eric Christopher · 13 years ago
  32. 9e631da Add AsmPrinter (aka MCLowering) support for ConstantDataSequential, by Chris Lattner · 13 years ago
  33. 6233907 Add various "string" methods to ConstantDataSequential, which have the by Chris Lattner · 13 years ago
  34. df39028 teach valuetracking about ConstantDataSequential by Chris Lattner · 13 years ago
  35. dada586 switch SCEV to use the new ConstantFoldLoadThroughGEPIndices function by Chris Lattner · 13 years ago
  36. a97ddd0 Split the interesting bits of ConstantFoldLoadThroughGEPConstantExpr by Chris Lattner · 13 years ago
  37. ff2b7f3 Add some accessor methods to CAZ and UndefValue that help simplify clients. by Chris Lattner · 13 years ago
  38. 46de2d5 Use correct register class for am2offset register operands. by Anton Korobeynikov · 13 years ago
  39. defe12d Preserve <def,undef> flags in CoalesceExtSubRegs. by Jakob Stoklund Olesen · 13 years ago
  40. 45bb5c5 implement the ConstantDataSequential accessor methods. by Chris Lattner · 13 years ago
  41. dfc8e47 Add comments near load pattern fragments indicating that all integer vector loads are promoted to v2i64 or v4i64 so that no one tries to reintroduce pattern fragments for other types. by Craig Topper · 13 years ago
  42. 539aab7 NEON VST4(multiple 4 element structures) assembly parsing. by Jim Grosbach · 13 years ago
  43. 8abe7e3 NEON VLD4(multiple 4 element structures) assembly parsing. by Jim Grosbach · 13 years ago
  44. 7945ead Tidy up. Remove some vertical space for readability. by Jim Grosbach · 13 years ago
  45. 3eb4be0 Revert r148686 (and r148694, a fix to it) due to a serious layering by Chandler Carruth · 13 years ago
  46. 7b426ce Fix typo. by Jim Grosbach · 13 years ago
  47. 4adb182 NEON VST3(single element from one lane) assembly parsing. by Jim Grosbach · 13 years ago
  48. 392ad6d Fix typo. by Devang Patel · 13 years ago
  49. d7433e2 NEON VST3(multiple 3-element structures) assembly parsing. by Jim Grosbach · 13 years ago
  50. c387fc6 NEON VLD3(multiple 3-element structures) assembly parsing. by Jim Grosbach · 13 years ago
  51. 2c6d0f2 Add missed mayStore flag to STREXD / t2STREXD by Anton Korobeynikov · 13 years ago
  52. 27dd9cf start the implementation of a new ConstantDataVector and ConstantDataArray by Chris Lattner · 13 years ago
  53. 4302a49 Remove extraneous ';'s. by Bill Wendling · 13 years ago
  54. d0278d5 Remove dead default. by David Blaikie · 13 years ago
  55. f2d2137 Intel syntax: Robustify parsing of memory operand's displacement experssion. by Devang Patel · 13 years ago
  56. 3a678af NEON VLD3 lane-indexed assembly parsing and encoding. by Jim Grosbach · 13 years ago
  57. 16d7d43 Add support for .cfi_signal_frame. Fixes pr11762. by Rafael Espindola · 13 years ago
  58. e0bd8c3 copyImplicitOps is redundant here - the loop above already copies these ops. by Lang Hames · 13 years ago
  59. d0848a6 Fix PR11829. PostRA LICM was too aggressive. by Jakob Stoklund Olesen · 13 years ago
  60. 39f6660 Simplify debug output. by Jakob Stoklund Olesen · 13 years ago
  61. 3e08131 Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] by Devang Patel · 13 years ago
  62. 8b31f95 Simplify some NEON assembly pseudo definitions. by Jim Grosbach · 13 years ago
  63. ee705a7 Silence warnings in -asserts build by Matt Beaumont-Gay · 13 years ago
  64. 7c64fe6 Intel syntax: Parse segment registers. by Devang Patel · 13 years ago
  65. 9df0fb4 convert CAZ, UndefValue, and CPN to use DenseMap's again, this time without by Chris Lattner · 13 years ago
  66. 95889fa revert r148691 and 148693 by Chris Lattner · 13 years ago
  67. 2587804 Implemented AddressSanitizer::getPassName() by Alexander Potapenko · 13 years ago
  68. db4b85f ARMAsmPrinter.cpp: Try to fix up r148686. EnableARMEHABI was also here. by NAKAMURA Takumi · 13 years ago
  69. 3755615 switch UndefValue and ConstantPointerNull over to DenseMap's for uniquing. by Chris Lattner · 13 years ago
  70. 2a82d82 Replace a use of ConstantUniqueMap for CAZ constants with a simple DenseMap. by Chris Lattner · 13 years ago
  71. 7925e25 Custom lower PCMPEQ/PCMPGT intrinsics to target specific nodes and remove the intrinsic patterns. by Craig Topper · 13 years ago
  72. 7908480 An option to selectively enable parts of ARM EHABI support. by Evgeniy Stepanov · 13 years ago
  73. 7fb8b0c Update more places to use target specific nodes for vector shifts instead of intrinsics. by Craig Topper · 13 years ago
  74. 80e4636 Custom lower vector shift intrinsics to target specific nodes and remove the patterns that are no longer needed. by Craig Topper · 13 years ago
  75. 4254df3 Avoid using an invalidated iterator. by Rafael Espindola · 13 years ago
  76. 603d6b5 The iteration order over a std::set<Module*> depends on the addresses of the by Rafael Espindola · 13 years ago
  77. 2b21fba Remove pattern fragments for v32i8, v16i16, v8i32, v16i8, v8i16, and v4i32 loads. All integer vector loads are promoted to v2i64 or v4i64 so these pattern fragments can never match. Fix or remove patterns that used these fragments. by Craig Topper · 13 years ago
  78. 37abc48 Make Value::isDereferenceablePointer() handle unreachable code blocks. (This by Nick Lewycky · 13 years ago
  79. 1906d32 Combine X86 CMPPD and CMPPS node types. Simplifies selection code and pattern matching. by Craig Topper · 13 years ago
  80. 67609fd Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ X86 ISD node types into only two node types. Simplifying opcode selection and pattern matching. by Craig Topper · 13 years ago
  81. 8194683 Use Attributes::None instead of 0 after r148553 change on Attributes from unsigned to their own class. by Nicolas Geoffray · 13 years ago
  82. ed2e13d Add target specific ISD node types for SSE/AVX vector shuffle instructions and change all the code that used to create intrinsic nodes to create the new nodes instead. by Craig Topper · 13 years ago
  83. 4a309f3 Add an option to disable buggy copy propagation pass by Anton Korobeynikov · 13 years ago
  84. 4b4e622 Add fused multiple+add instructions from VFPv4. Patch by Ana Pazos! by Anton Korobeynikov · 13 years ago
  85. b2798fa Remove trailing spaces by Eli Bendersky · 13 years ago
  86. 24973c1 Basic runtime dynamic loading capabilities added to ELFObjectFile, implemented by Eli Bendersky · 13 years ago
  87. 76463fd Split the lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h header to smaller logical headers. by Eli Bendersky · 13 years ago
  88. 07a2762 Make code a little less verbose. by Craig Topper · 13 years ago
  89. 6a32b6f Remove unused X86 ISD node type defines. by Craig Topper · 13 years ago
  90. 6fdf3d5 Move some vector shift patterns into their instruction definitions. by Craig Topper · 13 years ago
  91. babb145 Add memory patterns for some of the fp<->integer conversion instructions. Fold some patterns into instruction definitions. by Craig Topper · 13 years ago
  92. 8608cc9 Remove unused variables. by Benjamin Kramer · 13 years ago
  93. d9ec725 Fix PR11819 introduced by r148537. I'd commit the test case, but the generated code is terrible as it gets fully scalarized. Expect a future commit to fix that. by Craig Topper · 13 years ago
  94. 7423db2 Fix an obvious typo. by Evan Cheng · 13 years ago
  95. 8c47ad8 Handle register masks in LiveVariables. by Jakob Stoklund Olesen · 13 years ago
  96. 9339134 RuntimeDyld alignment adjustment from MachO file. by Jim Grosbach · 13 years ago
  97. 12a8863 Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction. by Jim Grosbach · 13 years ago
  98. 4888d5e Delete an unused member variable. by Jakob Stoklund Olesen · 13 years ago
  99. b442d7c Fix inverted condition. by Jim Grosbach · 13 years ago
  100. 1aea430 Intel syntax: Robustify register parsing. by Devang Patel · 13 years ago