- b067a1e Add support to use pextrw and pinsrw to extract and insert a word element by Evan Cheng · 19 years ago
- 506d3df - Added some SSE2 128-bit packed integer ops. by Evan Cheng · 19 years ago
- 2064a2b * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. by Evan Cheng · 19 years ago
- 4fcb922 - Clean up / consoladate various shuffle masks. by Evan Cheng · 19 years ago
- 0038e59 Model unpack lower and interleave as vector_shuffle so we can lower the by Evan Cheng · 19 years ago
- ffea91e Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups by Evan Cheng · 19 years ago
- c60bd97 Build arbitrary vector with more than 2 distinct scalar elements with a by Evan Cheng · 19 years ago
- bc4832b Support for scalar to vector with zero extension. by Evan Cheng · 19 years ago
- 386031a Handle BUILD_VECTOR with all zero elements. by Evan Cheng · 19 years ago
- 2c0dbd0 More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. by Evan Cheng · 19 years ago
- 14aed5e Handle more shuffle cases with SHUFP* instructions. by Evan Cheng · 19 years ago
- ca6e8ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do by Evan Cheng · 19 years ago
- 0188ecb - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support by Evan Cheng · 19 years ago
- 63d3300 - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches by Evan Cheng · 19 years ago
- b9df0ca Some splat and shuffle support. by Evan Cheng · 19 years ago
- 48090aa - Use movaps to store 128-bit vector integers. by Evan Cheng · 19 years ago
- c4c6257 Added getTargetLowering() to TargetMachine. Refactored targets to support this. by Evan Cheng · 19 years ago
- 020d2e8 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, by Evan Cheng · 19 years ago
- a0ea053 PIC related bug fixes. by Evan Cheng · 19 years ago
- 1efa40f split register class handling from explicit physreg handling. by Chris Lattner · 19 years ago
- 4217ca8dc Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
- 7ccced6 x86 / Darwin PIC support. by Evan Cheng · 19 years ago
- 551bf3f kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC by Nate Begeman · 19 years ago
- 368e18d Rework the SelectionDAG-based implementations of SimplifyDemandedBits by Nate Begeman · 19 years ago
- e3de85b Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a by Evan Cheng · 20 years ago
- 223547a - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. by Evan Cheng · 20 years ago
- 259e97c * Fix 80-column violations by Chris Lattner · 20 years ago
- ef6ffb1 Added custom lowering of fabs by Evan Cheng · 20 years ago
- 6dab053 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64 by Evan Cheng · 20 years ago
- c6fd6cd Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. by Chris Lattner · 20 years ago
- 87c890a adjust prototype by Chris Lattner · 20 years ago
- ee62557 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for by Nate Begeman · 20 years ago
- 559806f x86 CPU detection and proper subtarget support by Evan Cheng · 20 years ago
- acc398c First part of bug 680: by Nate Begeman · 20 years ago
- a3195e8 Fix sint_to_fp (fild*) support. by Evan Cheng · 20 years ago
- 67f92a7 Support for MEMCPY and MEMSET. by Evan Cheng · 20 years ago
- 4a46080 SSE cmov support. by Evan Cheng · 20 years ago
- e341316 Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS. by Evan Cheng · 20 years ago
- d9558e0 * Fast call support. * FP cmp, setcc, etc. by Evan Cheng · 20 years ago
- d90eb7f DAG based isel call support. by Evan Cheng · 20 years ago
- 38bcbaf More X86 floating point patterns. by Evan Cheng · 20 years ago
- 3a03ebb * Fix a GlobalAddress lowering bug. by Evan Cheng · 20 years ago
- d5781fc * Added support for X86 RET with an additional operand to specify number of by Evan Cheng · 20 years ago
- b077b84 * Added lowering hook for external weak global address. It inserts a load by Evan Cheng · 20 years ago
- 7226158 Added a hook to print out names of target specific DAG nodes. by Evan Cheng · 20 years ago
- 898101c X86 conditional branch support. by Evan Cheng · 20 years ago
- 7df96d6 X86 lowers SELECT to a cmp / test followed by a conditional move. by Evan Cheng · 20 years ago
- b873ff3 The second patch of X86 support for read cycle counter. by Andrew Lenharth · 20 years ago
- dbdbf0c Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch by Chris Lattner · 20 years ago