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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / b09a97e5653c2c391f8759ad6a966a15a0c4168a / test / CodeGen / X86 / fastcc.ll
  1. d36076e Turn on post-alloc scheduling for x86. by Evan Cheng · 15 years ago
  2. 79d4646 Fix this test to account for a movl $0 being emitted as an xor now, by Dan Gohman · 15 years ago
  3. 36a0947 Eliminate more uses of llvm-as and llvm-dis. by Dan Gohman · 15 years ago
  4. 7f13212 Fix test. by Evan Cheng · 16 years ago
  5. e2471a9 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. by Evan Cheng · 16 years ago
  6. 4a03775 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. by Evan Cheng · 16 years ago