- ecac9cb Added SSE cachebility ops by Evan Cheng · 19 years ago
- cc4f047 Instruction encoding bug by Evan Cheng · 19 years ago
- ea93f63 Add new intrinsic node definitions for tblgen use by Chris Lattner · 19 years ago
- 7b1d34b Added 128-bit packed integer subtraction. by Evan Cheng · 19 years ago
- 3246e06 Added CVTTPS2PI. by Evan Cheng · 19 years ago
- 7dda405 Added CVTSS2SI. by Evan Cheng · 19 years ago
- bc4832b Support for scalar to vector with zero extension. by Evan Cheng · 19 years ago
- ff70fe6 D'oh - should be even numbered. by Jim Laskey · 19 years ago
- c653d48 Added LDMXCSR by Evan Cheng · 19 years ago
- ac53ead plug the intrinsics into the patterns for movmsk* by Chris Lattner · 19 years ago
- 47622e3 Add dwarf register numbering to register data. by Jim Laskey · 19 years ago
- 8da17b2 Add support for dwarf register numbering. by Jim Laskey · 19 years ago
- 057f09b add another note by Chris Lattner · 19 years ago
- e6cd96d add a note by Chris Lattner · 19 years ago
- da10f19 Shuffle some includes around by Chris Lattner · 19 years ago
- da91bdc expose intrinsic info to the targets. by Chris Lattner · 19 years ago
- 8edd11f Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? by Chris Lattner · 19 years ago
- 54e869e Like the comment says, prefer to use the implicit add done by [r+r] addressing by Chris Lattner · 19 years ago
- 98a6979 Clean up some commentary. by Jim Laskey · 19 years ago
- 7fbcef7 Disable the i32->float G5 optimization. It is unsafe, as documented in the by Chris Lattner · 19 years ago
- 64b3a08 add support for using vxor to build zero vectors. This implements by Chris Lattner · 19 years ago
- 386031a Handle BUILD_VECTOR with all zero elements. by Evan Cheng · 19 years ago
- 9d5da1d Gabor points out that we can't spell. :) by Chris Lattner · 19 years ago
- 5217a5b All v2f64 shuffle cases can be handled. by Evan Cheng · 19 years ago
- 2c0dbd0 More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. by Evan Cheng · 19 years ago
- b20aace A new entry by Evan Cheng · 19 years ago
- cf22612 Ignore the burg output files. by Reid Spencer · 19 years ago
- 14aed5e Handle more shuffle cases with SHUFP* instructions. by Evan Cheng · 19 years ago
- 716aefc add a note by Chris Lattner · 19 years ago
- 8fc23cd Typo by Evan Cheng · 19 years ago
- dc6af72 Add PPC vector bit-convert support by Chris Lattner · 19 years ago
- f1d78e8 Add support to locate local variables in frames (early version.) by Jim Laskey · 19 years ago
- 99db044 Change interface to DwarfWriter. by Jim Laskey · 19 years ago
- 580418e Modify how CBE handles #lines. by Jim Laskey · 19 years ago
- 29b4dd0 Fix the encodings of these new instructions, hopefully fixing the JIT by Chris Lattner · 19 years ago
- 24dc1f5 Following icc's lead: use movdqa to load / store 128-bit integer vectors by Evan Cheng · 19 years ago
- bc641b9 Eliminate IntrinsicLowering from TargetMachine. by Chris Lattner · 19 years ago
- ef98691 remove always-null IntrinsicLowering argument. by Chris Lattner · 19 years ago
- 3b047f7 Add v4i32 <-> v4f32 bitconvert patterns. by Evan Cheng · 19 years ago
- a971f6f Add 128-bit integer vector load and add (for testing). by Evan Cheng · 19 years ago
- ce94482 Add support for 8 bit immediates with 16/32 bit cmp instructions by Nate Begeman · 19 years ago
- ca6e8ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do by Evan Cheng · 19 years ago
- 0cea6d2 SHUFP* are two address code. by Evan Cheng · 19 years ago
- a88973f Some clean up. by Evan Cheng · 19 years ago
- 1bffadd - Supposely movlhps is faster / better than unpcklpd. by Evan Cheng · 19 years ago
- 0188ecb - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support by Evan Cheng · 19 years ago
- 63d3300 - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches by Evan Cheng · 19 years ago
- c04b423 add a note by Chris Lattner · 19 years ago
- 2da953f Fix PSHUF* and SHUF* jit code emission problems by Evan Cheng · 19 years ago
- 9d86a9d This has been implemented. Tweak it into another note by Chris Lattner · 19 years ago
- ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 19 years ago
- e5ba580 Add support for "ri" addressing modes where the immediate is a 14-bit field by Chris Lattner · 19 years ago
- 6df1154 fix a warning by Chris Lattner · 19 years ago
- b9df0ca Some splat and shuffle support. by Evan Cheng · 19 years ago
- a9f2a71 Add a couple more pseudo instructions. by Evan Cheng · 19 years ago
- eb8b09f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp by Chris Lattner · 19 years ago
- 4a7da36 Didn't mean to check this in. No MMX support yet. by Evan Cheng · 19 years ago
- 48090aa - Use movaps to store 128-bit vector integers. by Evan Cheng · 19 years ago
- 9b3bd46 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. by Chris Lattner · 19 years ago
- f3ce432 Don't emit pseudo instructions! by Chris Lattner · 19 years ago
- c0a8b6d Update readme by Nate Begeman · 19 years ago
- 13feb58 Print absolute memory references like this: by Chris Lattner · 19 years ago
- 7ab5404 Combine 2 entries by Evan Cheng · 19 years ago
- 50a6d8c Add a note about x86 register coallescing by Evan Cheng · 19 years ago
- 82521dd - Remove scalar to vector pseudo ops. They are just wrong. by Evan Cheng · 19 years ago
- 8151914 With Evan's latest tblgen patch, this code is obsolete, thanks Evan! by Chris Lattner · 19 years ago
- 8593f98 When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. by Chris Lattner · 19 years ago
- ef040dd minor note by Chris Lattner · 19 years ago
- 811ec1c x86 ISD::SCALAR_TO_VECTOR support. by Evan Cheng · 19 years ago
- 5c791c8 Junk unused vector register classes. by Evan Cheng · 19 years ago
- d979644 Handle constant addresses more efficiently, folding the low bits into the by Chris Lattner · 19 years ago
- 23baa1b remove dead variable by Chris Lattner · 19 years ago
- bd83afd Fix a couple of bugs in permute/splat generate, thanks to Nate for actually by Chris Lattner · 19 years ago
- e376e00 reenable this hack, the tblgen version isn't quite ready by Chris Lattner · 19 years ago
- 32f57d9 Fix the pattern for VADDUWM, add i32 splat by Chris Lattner · 19 years ago
- e63d746 Use tblgen'd VECTOR_SHUFFLE selection code. by Evan Cheng · 19 years ago
- dd4d2d0 Add support for generating vspltw, instead of a vperm instruction with a by Chris Lattner · 19 years ago
- 88a99ef Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. by Chris Lattner · 19 years ago
- ef819f8 fix duplicate definition errors by Chris Lattner · 19 years ago
- 39afef3 Add a build_vector node by Chris Lattner · 19 years ago
- 3c0f9cc Check in some intermediate code that adds a skeleton for matching vsplt* by Chris Lattner · 19 years ago
- ba753c6 Move a few things around. by Evan Cheng · 19 years ago
- fa818d0 add vector_shuffle by Chris Lattner · 19 years ago
- 08e25de fix typo by Chris Lattner · 19 years ago
- 556aae0 add vsplat instructions, fix sched description for vperm by Chris Lattner · 19 years ago
- f1d0b2b Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. by Chris Lattner · 19 years ago
- 2bc6dc2 Claim to have v16i8 for perm masks by Chris Lattner · 19 years ago
- abdff1e add the vperm instruction by Chris Lattner · 19 years ago
- 8bcf926 add a note with a testcase by Chris Lattner · 19 years ago
- 28097d0 Add a note about the MUL -> FMADD vector bug. by Chris Lattner · 19 years ago
- c12e6c4 Vector undef's by Evan Cheng · 19 years ago
- b2177b9 Custom lower SCALAR_TO_VECTOR into lve*x. by Chris Lattner · 19 years ago
- ab515b0 PPC doesn't have SCALAR_TO_VECTOR by Chris Lattner · 19 years ago
- 528180e add support for vector undef by Chris Lattner · 19 years ago
- d3864b5 Remind us of exit value substitution by Evan Cheng · 19 years ago
- 5fef51e Turning on LSR by default by Evan Cheng · 19 years ago
- 0def9c3 Remember which tests are hurt by LSR. by Evan Cheng · 19 years ago
- a17409d minor fixes by Chris Lattner · 19 years ago
- 28b1a0b notes by Chris Lattner · 19 years ago
- 0a7bff0 we don't use lmw/stmw. When we want them they are easy enough to add by Chris Lattner · 19 years ago