- b474620 by Danil Malyshev · 12 years ago
- 6ae599a Missed getPointerToNamedFunction() declaration. by Danil Malyshev · 12 years ago
- 7803ec3 Based on this discussion: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120305/138477.html by Danil Malyshev · 12 years ago
- 331ff3b Checking a build_vector for an all-ones value. by Jim Grosbach · 12 years ago
- 208a4ff [asan] fix one more bug related to long double by Kostya Serebryany · 12 years ago
- d9e85ef Put Is64BitMemOperand into !defined(NDEBUG) for now. by Joerg Sonnenberger · 12 years ago
- 47817f3 Use a signed value for this enum to avoid spuriuos warnings from gcc. by Benjamin Kramer · 12 years ago
- ff739c1 Teach instsimplify to gracefully degrade in the presence of instructions by Chandler Carruth · 12 years ago
- a8d873e [python] Add some paths where to find test binary by Anders Waldenborg · 12 years ago
- 3595954 [python] Mark get_test_binary as not being a test by Anders Waldenborg · 12 years ago
- 9146e66 lit/TestRunner.py: [Win32] Rework WinWaitReleased() again! "win32file" from Python Win32 Extensions. by NAKAMURA Takumi · 12 years ago
- 57f33c8 Finish organizing C API docs. by Gregory Szorc · 12 years ago
- 4fd3d29 Fix generation of the address size override prefix. Add assertions for by Joerg Sonnenberger · 12 years ago
- 10fa51b I meant to disable this test, not XFAIL it by Andrew Trick · 12 years ago
- c6a19dd misched: beginning to add unit tests by Andrew Trick · 12 years ago
- f70af52 misched: fix LiveInterval update for bottom-up scheduling by Andrew Trick · 12 years ago
- aad37f1 misched: trace LiveIntervals after scheduling. by Andrew Trick · 12 years ago
- 1ce062f misched: obvious iterator update fixes for bottom-up. by Andrew Trick · 12 years ago
- 0b0d899 misched: cleanup main loop by Andrew Trick · 12 years ago
- e0b51ab misched: fix LI update for bottom-up. by Andrew Trick · 12 years ago
- 6244b51 Organize LLVM C API docs into doxygen modules; add docs by Gregory Szorc · 12 years ago
- 9be7c94 Add typecast to silence -Wswitch warning introduced by r153153. by Craig Topper · 12 years ago
- 3d092db Spacing fixes and using 'unsigned' instead of 'int' to index to select shuffle elements for consistency with other shuffle code in X86 backend. by Craig Topper · 12 years ago
- fb54afb Incremental big endian patch by Jack Carter. by Akira Hatanaka · 12 years ago
- b7febfb Zap some dead code pointed out by Chandler. by Eric Christopher · 12 years ago
- 4211c19 Make sure ImmutableSet never inserts Tombstone/Entry into DenseMap. by Anna Zaks · 12 years ago
- 5069b21 RuntimeDyldMachO has the ability to keep track of by Sean Callanan · 12 years ago
- 768b4e8 Fix test case from r153135. by Chad Rosier · 12 years ago
- 1b1fdc0 [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu to by Chad Rosier · 12 years ago
- 48c9533 Assembler should accept redefinitions of unused variable symbols. by Jim Grosbach · 12 years ago
- 93a1a0d Tidy up. by Jim Grosbach · 12 years ago
- 03a1852 Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and t2PseudoExpand. by Evan Cheng · 12 years ago
- 7edc277 LoopSimplify bug fix. Handle indirect loop back edges. by Andrew Trick · 12 years ago
- cd1142e whitespace by Andrew Trick · 12 years ago
- a3b10b8 LSR: teach isSimplifiedLoopNest to handle PHI IVUsers. by Andrew Trick · 12 years ago
- f949228 LSR: fix IVUsers isSimplifiedLoopNest to perform a full domtree walk by Andrew Trick · 12 years ago
- aa7b3df Reserve number of MI operands to accom,odate complex patterns. by Evan Cheng · 12 years ago
- 98a27ac remove unused variable by Matt Beaumont-Gay · 12 years ago
- a3bfdf5 [avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to give by Chad Rosier · 12 years ago
- aaa1e2f Require a base pointer for stack realignment when SP may vary dynamically. by Bob Wilson · 12 years ago
- 055a812 Remove some redundant checks. by Bob Wilson · 12 years ago
- 666da16 Whitespace. by Chad Rosier · 12 years ago
- 36a273a [avx] Move the vextractf128 patterns closer to the vextractf128 def. Remove by Chad Rosier · 12 years ago
- 9f2e160 Fix assembling ARM vst2 instructions with double-spaced registers. by Kevin Enderby · 12 years ago
- 07cdd80 ARM non-scattered MachO relocations for movw/movt. by Jim Grosbach · 12 years ago
- 1fc999e Fix test. by Chad Rosier · 12 years ago
- 33e528d [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads. by Chad Rosier · 12 years ago
- 5c062ad The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this. by Silviu Baranga · 12 years ago
- 8da7a46 test commit by Silviu Baranga · 12 years ago
- db9ca59 Test Commit - add a newline by Richard Barton · 12 years ago
- 21e42d0 It's possible to have a constant expression who's size is quite big (e.g., by Bill Wendling · 12 years ago
- 89f4e66 Remove code that prevented lowering shuffles if they are used by load and themselves used by a extract_vector_elt. This was done to allow the DAG combiner to collapse to a single element load. Unfortunately, sometimes the extract_vector_elt would disappear before DAG combine could do the transformation leaving a vector_shuffle that isel couldn't handle. New code lets the shuffle be converted to a target specific node, but then adds a combine routine that can convert target specific nodes back to vector_shuffles if the folding criteria are met. by Craig Topper · 12 years ago
- a1ffc68 Factor out target shuffle mask decoding from getShuffleScalarElt and use a SmallVector of int instead of unsigned for shuffle mask in decode functions. Preparation for another change. by Craig Topper · 12 years ago
- 0c9da21 When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add users of the final load to the worklist too. Needed by changes I'm preparing to make to X86 backend. by Craig Topper · 12 years ago
- 8c5293c Do everything up to generating code to try to get a register for by Eric Christopher · 12 years ago
- c415af2 Untabify. by Eric Christopher · 12 years ago
- 4476bae Add another debugging statement here. by Eric Christopher · 12 years ago
- 4e27027 Use lookUpRegForValue here instead of duplicating the code. by Eric Christopher · 12 years ago
- 1aa73cc Fix two bugpoint bugs: by Chris Lattner · 12 years ago
- e0ac6f8 fix PR12301 - llvm-bcanalyze should print to stdout, not stderr (except for errors). by Chris Lattner · 12 years ago
- cfe2998 f16 FDIV can now be legalized by promoting to f32 by Pete Cooper · 12 years ago
- e59b0e7 fix a build failure with libc++ by Chris Lattner · 12 years ago
- fa1f744 ARM branch relaxation for unconditional t1 branches. by Jim Grosbach · 12 years ago
- ceee984 ARM assembly, accept optional '#' on lane index number. by Jim Grosbach · 12 years ago
- 1f6e3f9 [Object/COFF]: Expose getSectionContents. by Michael J. Spencer · 12 years ago
- b35a896 [Object/COFF]: Expose getSectionName. Also add some documentation. by Michael J. Spencer · 12 years ago
- 2d7ea04 Perform mul combine when multiplying wiht negative constants. by Anton Korobeynikov · 12 years ago
- 23f1cbb Add an option to the MI scheduler to cut off scheduling after a fixed number of by Lang Hames · 12 years ago
- 8c0134a [asan] don't emit __asan_mapping_offset/__asan_mapping_scale by default -- they are currently used only for experiments by Kostya Serebryany · 12 years ago
- 5587a8e llvm/test/DebugInfo: Move two tests to DebugInfo/X86. They are X86-dependent. by NAKAMURA Takumi · 12 years ago
- 00294ca Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala. by Duncan Sands · 12 years ago
- 3e99b71 This patch adds X86 instruction itineraries for non-pseudo opcodes in by Preston Gurd · 12 years ago
- 8118c94 Add a note for -ffast-math optimization of vector norm. by Benjamin Kramer · 12 years ago
- a87a75f Make the formatting of this file more consistent, and fix the 80-columns by Chandler Carruth · 12 years ago
- 080b862 Teach InstVisitor about the UnaryInstruction layer in the instruction by Chandler Carruth · 12 years ago
- f201a06 Factor out the multiply analysis code in ComputeMaskedBits and apply it to the by Nick Lewycky · 12 years ago
- 97327dc isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask. by Craig Topper · 12 years ago
- 75d05e6 This clause (although matching parts of the implementation) can't be correct. by Nick Lewycky · 12 years ago
- cff4ad7 CriticalAntiDepBreaker: Replace a SmallSet of regs with a much denser BitVector. by Benjamin Kramer · 12 years ago
- 79aa341 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. by Craig Topper · 12 years ago
- 85f9cef MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty. by Benjamin Kramer · 12 years ago
- 70de1e4 Fix some copy and paste remnants of Cell and SPU in Hexagon files. by Craig Topper · 12 years ago
- 8aea2dd Fix typo in file header. by Craig Topper · 12 years ago
- 1e0c9ab Pass TargetOptions to HexagonTargetMachine constructor by reference to match other targets and the base class. by Craig Topper · 12 years ago
- c1f6f42 Reorder includes to match coding standards. Fix an issue or two exposed by that. by Craig Topper · 12 years ago
- ae151ed MC asm parser macro argument count was wrong when empty. by Jim Grosbach · 12 years ago
- 5aeff31 Check if we can handle the arguments of a call (and therefore the call) in by Bill Wendling · 12 years ago
- 391c145 Revert r152915. Chapuni's WinWaitReleased refactoring: It doesn't work for me by Francois Pichet · 12 years ago
- 748c1ec clarify the coding standards a bit. by Chris Lattner · 12 years ago
- 11d5dc3 ARM fix silly typo in optional operand alias. by Jim Grosbach · 12 years ago
- 66cba30 ARM divided syntax fmrx/fmxr mnemonics. by Jim Grosbach · 12 years ago
- be7cf2b ARM ldm/stm register lists can be out of order. by Jim Grosbach · 12 years ago
- 0ccae0b Revert r152907. by Bill Wendling · 12 years ago
- a82d526 ScheduleDAGInstrs: When adding uses we add them into a set that's empty at the beginning, no need to maintain another set for the added regs. by Benjamin Kramer · 12 years ago
- 861ea23 Limit the number of memory operands in MachineInstr to 2^16 and store the number in padding. by Benjamin Kramer · 12 years ago
- 87f3dbc CriticalAntiDepBreaker: BasicBlock::size is an expensive operation, reuse the cached value. by Benjamin Kramer · 12 years ago
- bb0b6ed lit/TestRunner.py: [Win32] Check all opened_files[] released, rather than (obsoleted) written_files[]. by NAKAMURA Takumi · 12 years ago
- 7c6ac2e lit/TestRunner.py: [Win32] Rework WinWaitReleased(). by NAKAMURA Takumi · 12 years ago
- ff030fd The alignment of the pointer part of the store instruction may have an by Bill Wendling · 12 years ago
- 5a4c790 More const-correcting of FixedLenDecoderEmitter. by Craig Topper · 12 years ago