1. b5c26ef SCEVExpander fixes. Affects LSR and indvars. by Andrew Trick · 13 years ago
  2. 0e2037b Add support for selecting 256-bit PALIGNR. by Craig Topper · 13 years ago
  3. b288850 cmake: pass -fvisibility-inlines-hidden if it is supported. In a by Rafael Espindola · 13 years ago
  4. a486783 Remove a low-quality test which was failing on Windows; test/CodeGen/X86/sret.ll is a better test for the relevant behavior. by Eli Friedman · 13 years ago
  5. b618ea5 When lowering the 'resume' instruction, look to see if we can eliminate the by Bill Wendling · 13 years ago
  6. 9a2478a Support MSVC x86-32 sret convention. PR11688. Patch by Joe Groff. by Eli Friedman · 13 years ago
  7. f46fbad Fix typo. by Chad Rosier · 13 years ago
  8. e545ee2 Silence warnings about mixing enums. by Benjamin Kramer · 13 years ago
  9. 27ff6b5 Add a dump() implementation for sub-instruction MCOperands. by Owen Anderson · 13 years ago
  10. 7b672fe Add a new form of MCOperand, for representing sub-instructions. This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks. Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call. by Owen Anderson · 13 years ago
  11. 0cdece4 Set the "tail" flag on pattern-matched objc_storeStrong calls. rdar://10531041. by Dan Gohman · 13 years ago
  12. a951f77 Post process 'and', 'sub' instructions and select better encoding, if available. by Devang Patel · 13 years ago
  13. f460bf8 Actually, this code handles wrapped sets just fine. Noticed by inspection. by Nick Lewycky · 13 years ago
  14. e60540f Intel syntax: There is no need to create unary expr for simple negative displacement. by Devang Patel · 13 years ago
  15. ac0f048 Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available. by Devang Patel · 13 years ago
  16. 73dd8bb Emit ARM EHABI unwinding instructions for 3 more Thumb instructions. by Evgeniy Stepanov · 13 years ago
  17. 40385c8 Folding table additions and fixes for AVX. by Craig Topper · 13 years ago
  18. 1a7700a Merge 128-bit and 256-bit SHUFPS/SHUFPD handling. by Craig Topper · 13 years ago
  19. ef2887d More bundle related API additions. by Evan Cheng · 13 years ago
  20. 3f9c251 Rewriter should definitly rewrite instructions inside bundles. by Evan Cheng · 13 years ago
  21. 46ada15 Introduce a new MutableArrayRef class, which refers to a series of mutable by Chris Lattner · 13 years ago
  22. a2e435c Enhance finalizeBundle to return end of bundle iterator because it makes sense. by Evan Cheng · 13 years ago
  23. ae69f70 ARM assembly diagnostic caret in better position for FPImm. by Jim Grosbach · 13 years ago
  24. 9363c58 Thumb2 relaxation for tADR to t2ADR. by Jim Grosbach · 13 years ago
  25. d26bad0 Add comment and fix range check in condition. by Jim Grosbach · 13 years ago
  26. 904b7be Add testcase. by Jim Grosbach · 13 years ago
  27. c222005 Added methods to get the live range immediately before a given slot. Intended to parallel the getVNInfoBefore method. by Lang Hames · 13 years ago
  28. 2faa5d2 Space after punctuation. by Nick Lewycky · 13 years ago
  29. bca15f9 - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing by Evan Cheng · 13 years ago
  30. 22de16d Add a TargetOption for disabling tail calls. by Nick Lewycky · 13 years ago
  31. 9b15971 Rename Finalizebundle to finalizeBundle to conform to coding guideline. by Evan Cheng · 13 years ago
  32. c38c456 Add experimental -x86-use-regmask command line option. by Jakob Stoklund Olesen · 13 years ago
  33. 71f0fc1 Ignore register mask operands when lowering instructions to MC. by Jakob Stoklund Olesen · 13 years ago
  34. 9cf37e8 Add a RegisterMaskSDNode class. by Jakob Stoklund Olesen · 13 years ago
  35. 8887a0f Add support for the gnueabihf environment. Patch by Sylvestre Ledru. by Rafael Espindola · 13 years ago
  36. 0b4c673 Thumb2 alternate syntax for LDR(literal) and friends. by Jim Grosbach · 13 years ago
  37. b8ba13f Process instructions after match to select alternative encoding which may be more desirable. by Devang Patel · 13 years ago
  38. 5aa5368 Replace FIXME with explanatory comment. by Jim Grosbach · 13 years ago
  39. 256ba4f Thumb2 relaxation for LDR(literal). by Jim Grosbach · 13 years ago
  40. ec4ceb7 MCAssembler tweak for determining when a symbol difference is resolved. by Jim Grosbach · 13 years ago
  41. a2ee0fa Rename pattern for clarity. by Jim Grosbach · 13 years ago
  42. 2f77bbd Add a depth limit to avoid runaway recursion. by Dan Gohman · 13 years ago
  43. 1dae3e9 Use llvm.global_ctors to locate global constructors instead by Dan Gohman · 13 years ago
  44. 785a7a9 Remove trailing spaces and unneeded includes. by Jakub Staszak · 13 years ago
  45. a402271 Document the fact that the selection dag changes the vselect condition type by Nadav Rotem · 13 years ago
  46. bfab85e Fixed macro condition. by Lang Hames · 13 years ago
  47. bc3af9b Tidy up. 80 columns. by Jim Grosbach · 13 years ago
  48. ec34338 Tidy up. MCAsmBackend naming conventions. by Jim Grosbach · 13 years ago
  49. 160fee7 Remove dead code. by Bill Wendling · 13 years ago
  50. 819026f Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted. by Nadav Rotem · 13 years ago
  51. cd7f02b Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE by Pete Cooper · 13 years ago
  52. 5a7efa7 Thumb2 load/store fixups don't set the thumb bit. by Jim Grosbach · 13 years ago
  53. 9b5b125 Move some ARM specific MCAssmebler bits into the ARMAsmBackend. by Jim Grosbach · 13 years ago
  54. 3186766 Add a CoveredBySubRegs property to Register descriptions. by Jakob Stoklund Olesen · 13 years ago
  55. 7434c9a [lit] Add a --filter option which is useful when dealing with virtual test by Daniel Dunbar · 13 years ago
  56. 0271dad Remove unneeded include. by Jakub Staszak · 13 years ago
  57. 3ee7d15 Implement ARMBaseRegisterInfo::getCallPreservedMask(). by Jakob Stoklund Olesen · 13 years ago
  58. 893f486 Fix MCJIT memory leak of owned TargetMachine. by Jim Grosbach · 13 years ago
  59. 0bd2ae9 Move X86 callee saved register lists to the X86CallConv .td file. by Jakob Stoklund Olesen · 13 years ago
  60. ec57253 Add TableGen support for callee saved registers. by Jakob Stoklund Olesen · 13 years ago
  61. 97af768 Test case rename by Andrew Trick · 13 years ago
  62. bda43e9 Move includes to the .cpp file. by Jakub Staszak · 13 years ago
  63. 8b9300b MC tweak symbol difference resolution for non-local symbols. by Jim Grosbach · 13 years ago
  64. 283f1ff Tidy up. by Jim Grosbach · 13 years ago
  65. 2f8af1d Intel syntax: Fix parser match class to check memory operand size. by Devang Patel · 13 years ago
  66. ba05c91 Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT. by Nadav Rotem · 13 years ago
  67. 6220fea Intel syntax: Parse "BYTE PTR [RDX + RCX]" by Devang Patel · 13 years ago
  68. fced294 Trailing spaces. by Jakub Staszak · 13 years ago
  69. 2f6263c Add a new ObjC ARC optimization pass to eliminate unneeded by Dan Gohman · 13 years ago
  70. 7d4c87e Add a new PassManagerBuilder customization point, by Dan Gohman · 13 years ago
  71. bc51e50 Untabify. by Devang Patel · 13 years ago
  72. 9a3d293 Intel syntax: Do not unncessarily create plus expression for memory operand displacement. by Devang Patel · 13 years ago
  73. 40bced0 Intel syntax: Ignore mnemonic aliases. by Devang Patel · 13 years ago
  74. aa2bb63 Remove "XFAIL: arm" from test/ExecutionEngine/test-return.ll by Eli Bendersky · 13 years ago
  75. d37ad24 Intel syntax: Robustify memory operand parsing. by Devang Patel · 13 years ago
  76. f61f22a Add an LLDB data formatter script for llvm::SmallVector, maybe this is helpful to someone else. by Benjamin Kramer · 13 years ago
  77. 44b920f Removes template magic to build up containers. by Manuel Klimek · 13 years ago
  78. a16d441 Fix warning. by Nadav Rotem · 13 years ago
  79. a7f99f2 Additional ExecutionEngine tests, as part of bringing up the MCJIT on ELF by Eli Bendersky · 13 years ago
  80. 0b94b5f Fix 11769. by Nadav Rotem · 13 years ago
  81. d3b5889 Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector type. by Craig Topper · 13 years ago
  82. 8b5a6b6 Remove unnecessary AVX check from an assert. hasSSE2 is enough. by Craig Topper · 13 years ago
  83. 58bd151 Provide better messages in llvm_unreachable. by David Blaikie · 13 years ago
  84. c6cf11b misched: Inital interface and implementation for ScheduleTopDownLive and ShuffleInstructions. by Andrew Trick · 13 years ago
  85. 42b7a71 Renamed MachineScheduler to ScheduleTopDownLive. by Andrew Trick · 13 years ago
  86. c1b1c7b Moving options declarations around. by Andrew Trick · 13 years ago
  87. 0f08091 LSR fix: broaden the check for loop preheaders. by Andrew Trick · 13 years ago
  88. 37c2677 Fix a crasher when PerformShiftCombine receives a BUILD_VECTOR of all UNDEF. Probably could use better handling in DAG combine or getNode. Fixes PR11772. by Craig Topper · 13 years ago
  89. fdebc38 Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary) by David Blaikie · 13 years ago
  90. 2150606 Add 148175 back. I am unable to reproduce any non determinism in a dragonegg by Rafael Espindola · 13 years ago
  91. f214b80 Makefile: add missing files to FilesToConfig by Dylan Noblesmith · 13 years ago
  92. f57e1c2 Changed flag operand of ISD::FP_ROUND to TargetConstant as it should not get checked for legalisation by Pete Cooper · 13 years ago
  93. 1752e45 add some missing const qualifiers. by Chris Lattner · 13 years ago
  94. ff5bad0 Add portable bit mask operations to BitVector. by Jakob Stoklund Olesen · 13 years ago
  95. e02a17c Fix typo in comment. by Lang Hames · 13 years ago
  96. e0934be Tidy up. by Jim Grosbach · 13 years ago
  97. 020f4e8 ExecutionEngine interface to re-map addresses for engines that support it. by Jim Grosbach · 13 years ago
  98. 652ca2f MCJIT handle a few more simple x86 relocations for MachO. by Jim Grosbach · 13 years ago
  99. 2dd674f Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly. by David Blaikie · 13 years ago
  100. 17d2dbd Cleanup PPC RLWINM8 vs RLWINM by Hal Finkel · 13 years ago