- b80ada9 Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions. by Craig Topper · 13 years ago
- 0a15035 Add instruction selection for AVX2 integer comparisons. by Craig Topper · 13 years ago
- aaa643c Add AVX2 instruction lowering for add, sub, and mul. by Craig Topper · 13 years ago
- 89d093d Don't forget to check FlagNW when determining whether an AddRecExpr will wrap by Nick Lewycky · 13 years ago
- c6bcf43 Remove extra ';' by Devang Patel · 13 years ago
- dfa30e1 Remove the pubnames section, no one consumes it. by Eric Christopher · 13 years ago
- 2f2fe41 Add support for encoding immediates in icmp and fcmp. Hopefully, this will by Chad Rosier · 13 years ago
- 44ee471 Hide cpu name checking in ARMSubtarget. by Evan Cheng · 13 years ago
- f4c4768 Collapse DomainValues across loop back-edges. by Jakob Stoklund Olesen · 13 years ago
- dbc372f Link to the live DomainValue after merging. by Jakob Stoklund Olesen · 13 years ago
- 7151ddd Object/COFF: Fix PE reading. by Michael J. Spencer · 13 years ago
- 737e9a2 Track reference count independently from clear(). by Jakob Stoklund Olesen · 13 years ago
- ce1a538 Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts. by Bruno Cardoso Lopes · 13 years ago
- a2ff3e2 Emit the compact unwind *if* we have a compact unwind encoding. *headdesk* by Bill Wendling · 13 years ago
- 0fdb05d Call release() directly when cleaning up the remaining DomainValues. by Jakob Stoklund Olesen · 13 years ago
- 6bcb9a7 Rename all methods to follow style guide. by Jakob Stoklund Olesen · 13 years ago
- 35e9324 Handle reference counts in one function: release(). by Jakob Stoklund Olesen · 13 years ago
- 74d8a87 Also add the linkage name to the name accelerator tables if it exists by Eric Christopher · 13 years ago
- 9cae2d2 Add a hack to the scheduler to disable pseudo-two-address dependencies in by Dan Gohman · 13 years ago
- 3568a10 Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs. by Evan Cheng · 13 years ago
- 66dc8ca ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this. by Chad Rosier · 13 years ago
- 7781ae5 Fix code to match comment. Fixes PR11340, a regression from r143209. by Eli Friedman · 13 years ago
- e1b3e11 Clear old DomainValue after merging. by Jakob Stoklund Olesen · 13 years ago
- 0d64632 MC/COFF: Correctly emit the size of an empty string table. by Michael J. Spencer · 13 years ago
- 2d76a78 LICM pass now understands invariant load metadata. Nothing generates this yet so it will currently never get used in real tests by Pete Cooper · 13 years ago
- 67a917d Add the base ObjC method name to the names lookup table as well. by Eric Christopher · 13 years ago
- 5207bf2 Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. by Lang Hames · 13 years ago
- d752e0f Added invariant field to the DAG.getLoad method and changed all calls. by Pete Cooper · 13 years ago
- 30b4d8b A few more places where we can avoid multiple size queries. by Eric Christopher · 13 years ago
- ec8ffc2 Don't evaluate Data.size() on every iteration. by Eric Christopher · 13 years ago
- ad6eef4 This patch handles unaligned loads and stores in Mips JIT. Mips backend by Bruno Cardoso Lopes · 13 years ago
- 0839033 PPCInstrInfo.cpp: Fix one "unused" warning. by NAKAMURA Takumi · 13 years ago
- 9f1f26a Make sure to mark vector extload's as expand on ARM. Fixes PR11319. by Eli Friedman · 13 years ago
- 2efa35f Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318. by Eli Friedman · 13 years ago
- 7bc389b Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222 by Evan Cheng · 13 years ago
- 0eff39f Enable support for returning i1, i8, and i16. Nothing special todo as it's the by Chad Rosier · 13 years ago
- 58dd0fe Revert r144034 while I try to track down a crash. by Eli Friedman · 13 years ago
- e13eba2 This code is dead, what with the new EH model and the auto-upgraders in place. by Bill Wendling · 13 years ago
- b26c772 Kill and collapse outstanding DomainValues. by Jakob Stoklund Olesen · 13 years ago
- a29fc80 InstCombine now optimizes vector udiv by power of 2 to shifts by Pete Cooper · 13 years ago
- 1b4f6f2 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318. by Eli Friedman · 13 years ago
- 56c2b10 Add all completed and named types to the dwarf type accelerator tables. by Eric Christopher · 13 years ago
- a59ce03 Use a reverse post order instead of a DFS order. by Jakob Stoklund Olesen · 13 years ago
- 2dd5e1e Move the hash function to using and taking a StringRef. by Eric Christopher · 13 years ago
- e77546c Simple destructor to delete the hash data we created earlier. by Eric Christopher · 13 years ago
- 62c8e8e Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well. by Chad Rosier · 13 years ago
- 25265d0 Extract two methods. No functional change. by Jakob Stoklund Olesen · 13 years ago
- 4cae74b Various Mips64 floating point instruction patterns. by Akira Hatanaka · 13 years ago
- c370619 Add definition of the base class for floating point comparison instructions by Akira Hatanaka · 13 years ago
- 29d525a Add code needed for copying between 64-bit integer and floating pointer by Akira Hatanaka · 13 years ago
- e7126eb Add definitions of 64-bit instructions which move data between integer and by Akira Hatanaka · 13 years ago
- d8f9f34 MBB doesn't need to be a class member. by Jakob Stoklund Olesen · 13 years ago
- cd7dcad Fix pass name after the source was moved. by Jakob Stoklund Olesen · 13 years ago
- 70be28a Simplify some uses of utohexstr. by Benjamin Kramer · 13 years ago
- 055a647 Simplify code. No functionality change. by Benjamin Kramer · 13 years ago
- ac101e5 Make sure we don't insert instructions before a landingpad instruction. by Bill Wendling · 13 years ago
- 3e5d5c5 Expand V_SET0 to xorps by default. by Jakob Stoklund Olesen · 13 years ago
- d83d98d Add definition of 64-bit load upper immediate. by Akira Hatanaka · 13 years ago
- f83ba32 Include RegSaveAreaSize in the computation of stack size. by Akira Hatanaka · 13 years ago
- 213b2a2 Define functions that get or set the size of area on callee's stack frame which by Akira Hatanaka · 13 years ago
- c4d6fd5 Use array_lengthof to compute the number of iterations of a loop. by Akira Hatanaka · 13 years ago
- 7784046 Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted by Akira Hatanaka · 13 years ago
- 68698cc Make the type of shift amount i32 in order to reduce the number of shift by Akira Hatanaka · 13 years ago
- bce22b4 Add 64-bit to 32-bit trunc pattern. by Akira Hatanaka · 13 years ago
- 2ea4025 Use StringRef::startswith to do some string comparisons. by Eric Christopher · 13 years ago
- c545322 Avoid the use of a local temporary for comment twines. by Eric Christopher · 13 years ago
- 7135457 Allow for the case where the name of the subprogram is "". by Eric Christopher · 13 years ago
- 19a4daf Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV() by Richard Osborne · 13 years ago
- 76a4e1a Remove unnecessary addition to API. Replace with something much simpler. by Eric Christopher · 13 years ago
- 2c802b7 Add new files to cmake. by Eric Christopher · 13 years ago
- 09ac3d8 Add the support code to enable the dwarf accelerator tables. Upcoming patches by Eric Christopher · 13 years ago
- bcbd3a4 Add a new dwarf accelerator table prototype with the goal of replacing by Eric Christopher · 13 years ago
- d8a8752 Expose a way to get the beginning of the dwarf string section. by Eric Christopher · 13 years ago
- 6370118 Fix up comment. by Eric Christopher · 13 years ago
- 33aa20f Typo. by Eric Christopher · 13 years ago
- 4c763ee Add AVX2 variable shift instructions and intrinsics. by Craig Topper · 13 years ago
- 2869204 Add AVX2 VPMOVMASK instructions and intrinsics. by Craig Topper · 13 years ago
- 69f5df7 Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects. by Craig Topper · 13 years ago
- c8eb880 More AVX2 instructions and their intrinsics. by Craig Topper · 13 years ago
- 5908536 Replace (Lower|Upper)caseString in favor of StringRef's newest methods. by Benjamin Kramer · 13 years ago
- a7b966f Fix a typo. by Benjamin Kramer · 13 years ago
- 589fbb1 ADT/StringRef: Add ::lower() and ::upper() methods. by Daniel Dunbar · 13 years ago
- 5ced70d Return only the least significant 8 bits of the exit status from by Peter Collingbourne · 13 years ago
- 27e5d0c Add more AVX2 instructions and intrinsics. by Craig Topper · 13 years ago
- 42536af Add support for passing i1, i8, and i16 call parameters. Also, be sure to by Chad Rosier · 13 years ago
- 5eccd36 Audited all the format strings in libDebugInfo and fixed those that didn't match the types. by Benjamin Kramer · 13 years ago
- 80cc259 Reduce the offsets in DwarfDebugInfoEntry to 32 bit, they're printed with %x and by Benjamin Kramer · 13 years ago
- 3f4c979 Twinify. by Benjamin Kramer · 13 years ago
- ef56d1d MachOObject: Use DataExtractor's uleb parser instead of rolling our own. by Benjamin Kramer · 13 years ago
- c25c908 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer. by Benjamin Kramer · 13 years ago
- 336b88d Do simple cross-block DSE when we encounter a free statement. Fixes PR11240. by Nick Lewycky · 13 years ago
- 41a9649 Add more PRI.64 macros for MSVC and use them throughout the codebase. by Benjamin Kramer · 13 years ago
- 38f5c0d Allow i1 to be promoted to i32 for ARM APCS calling convention. by Chad Rosier · 13 years ago
- 9c58aa74 Added missing &. Fixes <rdar://problem/10393723> by Pete Cooper · 13 years ago
- bd00a93 Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes. by Eli Friedman · 13 years ago
- 451afbc Cannot create a result register for non-legal types. by Chad Rosier · 13 years ago
- a4e0727 When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit by Chad Rosier · 13 years ago
- 44e8957 Enable support for materializing i1, i8, and i16 integers via move immediate. by Chad Rosier · 13 years ago
- a0dd4cb Add mips ELF relocation types. Patch by Jack Carter! by Bruno Cardoso Lopes · 13 years ago
- 7b1dd9a build/cmake: Coalesce the configuration time header include fragment generation by Daniel Dunbar · 13 years ago