- 799aacf Fix macros arguments with an underscore, dot or dollar in them. This is based by Rafael Espindola · 12 years ago
- d7ae0f1 Make the wording in of the "expected identifier" error in the .macro directive by Rafael Espindola · 12 years ago
- 6d2986c ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines. by Jim Grosbach · 12 years ago
- af402ac Give this test an explicit triple. by Nick Lewycky · 12 years ago
- 0c5602d When emitting the PC range in an FDE, use the same data encoding for both ends by Nick Lewycky · 12 years ago
- 8d7e5ef Another 32 to 64 bit sign extension bug. by Jack Carter · 12 years ago
- 5ac2520 llvm/test/MC/COFF/seh.s: Fixup corresponding to r161487. by NAKAMURA Takumi · 12 years ago
- ef92055 Add `.pushsection', `.popsection', and `.previous' directives to Darwin ASM. by Bill Wendling · 12 years ago
- 5b0e9ce The define for 64 bit sign extension neglected to by Jack Carter · 12 years ago
- 61de70d The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 by Jack Carter · 12 years ago
- fc54d9e Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST. by Jack Carter · 12 years ago
- 1c37814 Support fpv4 for ARM Cortex-M4. by Jiangning Liu · 12 years ago
- fd652df Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue. by Jiangning Liu · 12 years ago
- c1b7ca5 Fix #13138, a bug around ARM instruction DSB encoding and decoding issue. by Jiangning Liu · 12 years ago
- 1fb27ec Fix #13241, a bug around shift immediate operand for ARM instruction ADR. by Jiangning Liu · 12 years ago
- 9714644 Keep empty assembly macro argument values in the middle of the list. by Jim Grosbach · 12 years ago
- 5af4de1 Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp by Kevin Enderby · 12 years ago
- 7f76cb6 Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms. by Craig Topper · 12 years ago
- 75dc33a Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. by Craig Topper · 12 years ago
- e035f65 Doubleword Shift Left Logical Plus 32 by Jack Carter · 12 years ago
- fd506ef The Mips specific relocation R_MIPS_GOT_DISP by Jack Carter · 12 years ago
- 657c7cb test case for revision 160084: Alignment filling between Mips function units by Jack Carter · 12 years ago
- 94e36e3 Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck. by Akira Hatanaka · 12 years ago
- fae96f1 Fix instruction description of VMOV (between two ARM core registers and two single-precision resiters) (and do it properly this time! by Richard Barton · 12 years ago
- 97a0c6b Reverse assembler/disassembler operand order for gather instructions. by Craig Topper · 12 years ago
- 270e362 Revert r159938 (and r159945) to appease the buildbots. by Chad Rosier · 12 years ago
- 241b77f Reapply r158846. by Akira Hatanaka · 12 years ago
- 2e7e34b Fix instruction description of VMOV (between two ARM core registers and two single-precision resiters) by Richard Barton · 12 years ago
- 8ed97ef Prevent ARM assembler from losing a right shift by #32 applied to a register by Richard Barton · 12 years ago
- 2b6652f Teach the assembler to use the narrow thumb encodings of various three-register dp instructions where permissable. by Richard Barton · 12 years ago
- 63d10fb revert r159851. by Akira Hatanaka · 12 years ago
- e32cc0d Reapply r158846. by Akira Hatanaka · 12 years ago
- a101014 Add aliases for pblendvb, blendvpd, and blendvps instructions with the implicit xmm0 operand specified. Fixes PR13252. by Craig Topper · 12 years ago
- 39ae363 Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructor by Jack Carter · 12 years ago
- 1de43ed Fix the remaining TCL-style quotes found in the testsuite. This is by Chandler Carruth · 12 years ago
- 49589f0 Convert the uses of '|&' to use '2>&1 |' instead, which works on old by Chandler Carruth · 12 years ago
- 4177e6f Convert all tests using TCL-style quoting to use shell-style quoting. by Chandler Carruth · 12 years ago
- 40307c7 X86: add more GATHER intrinsics in LLVM by Manman Ren · 12 years ago
- a6d6ef6 This allows hello world to be compiled for Mips 64 direct object. by Jack Carter · 12 years ago
- 4acefe1 Teach assembler to handle capitalised operation values for DSB instructions by Richard Barton · 12 years ago
- 1f7a1b6 X86: add GATHER intrinsics (AVX2) in LLVM by Manman Ren · 12 years ago
- 952caee Remove some duplicate instructions that exist only to given different mnemonics for the assembler. Use InstAlias instead. by Craig Topper · 12 years ago
- b935cd1 PR13013: ELF Type identification fails for MSB type ELF files. by Meador Inge · 12 years ago
- 70c9bf3 ARM: Add a better diagnostic for some out of range immediates. by Jim Grosbach · 12 years ago
- 02a227a Revert r158846. by Akira Hatanaka · 12 years ago
- b66510f In MipsDisassembler.cpp, instead of defining register class tables, use the ones by Akira Hatanaka · 12 years ago
- c9a4e26 Have ARM ELF use correct reloc for "b" instr. by Jan Wen Voung · 12 years ago
- 7e99a60 ARM: Define generic HINT instruction. by Jim Grosbach · 12 years ago
- fc9216e Implement irpc. Extracted from a patch by the PaX team. I just added the test. by Rafael Espindola · 12 years ago
- f49a409 Fix the encoding of the armv7m (MClass) for MSR registers other than aspr, by Kevin Enderby · 12 years ago
- aa7a2f2 Factor macro argument parsing into helper methods and add support for .irp. by Rafael Espindola · 12 years ago
- a1c7367 Replace assertion failure for badly formatted CPS instrution with error message. by Richard Barton · 12 years ago
- c8f2fcc Correct decoder for T1 conditional B encoding by Richard Barton · 12 years ago
- f6a186e Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips. by Akira Hatanaka · 12 years ago
- 1386e9b Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. by Benjamin Kramer · 12 years ago
- 3e96531 Refactor data-in-code annotations. by Jim Grosbach · 13 years ago
- 59c15e9 Fixed a bug in llvm-objdump when disassembling using -macho option for a binary by Kevin Enderby · 13 years ago
- 0fd4f3c Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing by Kevin Enderby · 13 years ago
- e545c4e Add a test case for r156840, a fix to llvm-objdump when disassembling using by Kevin Enderby · 13 years ago
- 2ec304c Add support for the .rept directive. Patch by Vladmir Sorokin. I added support by Rafael Espindola · 13 years ago
- 6a80f9d ELF: Add support for the asm .version directive. by Benjamin Kramer · 13 years ago
- bc3b27c AsmParser: Add support for the .purgem directive. by Benjamin Kramer · 13 years ago
- e14a3c5 AsmParser: ignore the .extern directive. by Benjamin Kramer · 13 years ago
- dec06ef AsmParser: Add support for .ifc and .ifnc directives. by Benjamin Kramer · 13 years ago
- a3dd0eb AsmParser: Add support for .ifb and .ifnb directives. by Benjamin Kramer · 13 years ago
- 4147e4d Make the following changes in MipsAsmPrinter.cpp: by Akira Hatanaka · 13 years ago
- 27ba61d Insert instructions to the entry basic block which initializes the global by Akira Hatanaka · 13 years ago
- 169e9ba Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions. by Silviu Baranga · 13 years ago
- ca3cd41 Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate. by Silviu Baranga · 13 years ago
- 2d524b0 Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits by Kevin Enderby · 13 years ago
- b422d0b Fixed disassembler for vstm/vldm ARM VFP instructions. by Silviu Baranga · 13 years ago
- 2727930 ARM: Add missing two-operand VBIC aliases. by Jim Grosbach · 13 years ago
- 0a552d6 Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures. by Richard Barton · 13 years ago
- 54319e2 ARM: Add a few missing add->sub aliases w/ 'w' suffix. by Jim Grosbach · 13 years ago
- 94b590f ARM: allow vanilla expressions for movw/movt. by Jim Grosbach · 13 years ago
- 686c018 MC: Unknown assembler directives are now hard errors. by Jim Grosbach · 13 years ago
- a9cc08f ARM: Thumb add(sp plus register) asm constraints. by Jim Grosbach · 13 years ago
- 04a09a4 Fix ARM assembly parsing for upper case condition codes on IT instructions. by Richard Barton · 13 years ago
- 71275b1 Missed some register numbers. by Benjamin Kramer · 13 years ago
- a356e94 Update edis test for r155704. by Benjamin Kramer · 13 years ago
- cac31de Specify cpu to unbreak tests. by Evan Cheng · 13 years ago
- 14ce6fa ARM: improved assembler diagnostics for missing CPU features. by Jim Grosbach · 13 years ago
- 24e767d Add missing test cases for ARM VLD3 (single 3-element structure to all lanes) by Kevin Enderby · 13 years ago
- 2c66edf Add missing test cases for ARM VLD4 (single 4-element structure to all lanes) by Kevin Enderby · 13 years ago
- c34954d ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI. by Jim Grosbach · 13 years ago
- 10a3933 Add ARM mode tests for the NEON vector shift-accumulate tests. by Jim Grosbach · 13 years ago
- 2b85250 Tidy up. Reformat for ease of reading. by Jim Grosbach · 13 years ago
- d8b3ed8 ARM: Update NEON assembly two-operand aliases. by Jim Grosbach · 13 years ago
- 181b147 ARM some VFP tblgen'erated two-operand aliases. by Jim Grosbach · 13 years ago
- bfb3c5a Tidy up. Formatting. by Jim Grosbach · 13 years ago
- 35ee7d2 Added support for disassembling unpredictable swp/swpb ARM instructions. by Silviu Baranga · 13 years ago
- 6b9f97d Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors. by Silviu Baranga · 13 years ago
- fa1ebc6 Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them. by Silviu Baranga · 13 years ago
- e546c4c Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction. by Silviu Baranga · 13 years ago
- 9e71231 Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler. by Silviu Baranga · 13 years ago
- ecdc9d5 Add disassembler to MIPS. by Akira Hatanaka · 13 years ago
- c5a2a33 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes) by Kevin Enderby · 13 years ago
- bf42f24 ARM two-operand forms for vhadd and vhsub instructions. by Jim Grosbach · 13 years ago
- 68f89a6 MC assembly parser handling for trailing comma in macro instantiation. by Jim Grosbach · 13 years ago
- 1fbfea7 This patch fixes 3 problems: by Akira Hatanaka · 13 years ago