- bd2b621 Fix a bug Sabre was having where the DAG root was a group. The group dominator by Jim Laskey · 20 years ago
- 9022ed9 Groups were not emitted if the dominator node and the node in the ordering list by Jim Laskey · 20 years ago
- 6aa4529 Since extload can also be used by FP, split STDIntExtLoad into two parts, by Nate Begeman · 20 years ago
- 76acc87 Add constant pool support, including folding into addresses. by Chris Lattner · 20 years ago
- e1389ad Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, by Chris Lattner · 20 years ago
- e357246 Add initial support for global variables, and fix a bug in addr mode selection by Chris Lattner · 20 years ago
- 04dd673 Claiming that branch targets are registers is not very wholesome. Change them by Chris Lattner · 20 years ago
- 456b940 Add unordered comparisons by Chris Lattner · 20 years ago
- 5b2dfc7 Add patterns to the rest of the int condbranches and some of the fp branches by Chris Lattner · 20 years ago
- 4d55aca Add initial conditional branch support. This doesn't actually work yet due by Chris Lattner · 20 years ago
- a5282d8 Simplify code by Chris Lattner · 20 years ago
- 38abcb5 Eliminate CMPri, which is a synonym for SUBCCri by Chris Lattner · 20 years ago
- 181b7a3 allow custom expansion of BR_CC by Chris Lattner · 20 years ago
- 294974b add fneg,fabs,fsqrt instructions by Chris Lattner · 20 years ago
- b4d5172 Add patterns for fround/fextend and the funny fsmuld instruction by Chris Lattner · 20 years ago
- 10c6aed Add FP +,-,*,/ by Chris Lattner · 20 years ago
- 558bfe0 Give patterns to F3_3 instructions by Chris Lattner · 20 years ago
- d19fc65 Implement 64-bit add/sub, make sure to receive and return 64-bit args with by Chris Lattner · 20 years ago
- 7087e57 implement div and rem by Chris Lattner · 20 years ago
- ee3d5fb implement MULHU/MULHS for 64-bit multiplies by Chris Lattner · 20 years ago
- 37949f5 Add patterns for multiply, simplify Y register handling stuff, add RDY instruction by Chris Lattner · 20 years ago
- 9034b88 Make the addressing modes smarter by Chris Lattner · 20 years ago
- 87a63f8 remove some unused instructions by Chris Lattner · 20 years ago
- 2cfdbb2 add andn/orn/xorn patterns. This allows us to compile this: by Chris Lattner · 20 years ago
- 217aabf Add support for 64-bit arguments by Chris Lattner · 20 years ago
- 9a60ff6 Sparc doesn't have sext_inreg by Chris Lattner · 20 years ago
- 53ec203 add patterns for FP stores by Chris Lattner · 20 years ago
- d55e1ca Add [reg+reg] integer stores by Chris Lattner · 20 years ago
- d30a630 Add store patterns by Chris Lattner · 20 years ago
- 0b21843 add truncstore by Chris Lattner · 20 years ago
- b575baf add fp load patterns, switch rest of loads and stores to use addrmodes by Chris Lattner · 20 years ago
- 1963783 Add integer load[r+r] forms. by Chris Lattner · 20 years ago
- 331355c Rename load/store instructions to include an RI suffix by Chris Lattner · 20 years ago
- 84e2abf Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts by Chris Lattner · 20 years ago
- bc83fd9 Add basic addressing mode support and one load. by Chris Lattner · 20 years ago
- 4543251 eliminate some redundancy by Chris Lattner · 20 years ago
- b71f9f8 Use a combination of sethi and or to build arbitrary immediates. by Chris Lattner · 20 years ago
- 57dd3bc Use sethi to build large immediates with zeros at the bottom by Chris Lattner · 20 years ago
- d2cd466 Add shift and small immediate support by Chris Lattner · 20 years ago
- f83cee6 Add some basic reg-reg instructions by Chris Lattner · 20 years ago
- e33a3ff Add empty patterns to all F3_1 instructions by Chris Lattner · 20 years ago
- bdce7b4 Darwin API issue: indirect load of external and weak symbols. by Evan Cheng · 20 years ago
- 7b0902d Add some simple integer patterns. This allows us to compile this: by Chris Lattner · 20 years ago
- 4b48631 Implement ret with operand, giving us this: by Chris Lattner · 20 years ago
- bc3d362 Add a pattern for 'ret'. This now compiles: by Chris Lattner · 20 years ago
- f3bf50d Add empty patterns for F3_2 instructions by Chris Lattner · 20 years ago
- a01b757 Implement LowerArguments, at least for the first 6 integer args by Chris Lattner · 20 years ago
- 6c18b10 Add the framework for a dag-dag isel by Chris Lattner · 20 years ago
- 433dbda Remove a few lines of dead code. by Evan Cheng · 20 years ago
- 576e46f asmprinter done, added crucial missing step by Chris Lattner · 20 years ago
- 967abf3 Use the AsmPrinter for global variable init printing. This eliminates a by Chris Lattner · 20 years ago
- b5e9eb6 Switch constant pool printing over to use the Shared AsmPrinter version by Chris Lattner · 20 years ago
- 1dbed16 Use the shared AsmPrinter code for some basic stuff. No functionality by Chris Lattner · 20 years ago
- 98abbfb Added an idea about any_extend for performance tuning. by Evan Cheng · 20 years ago
- 0d8fcd3 Convert the remaining instructions over, branches and calls. Fix a couple by Chris Lattner · 20 years ago
- dc6938a convert FP instructions to use an asmstring and operand list, allowing FP by Chris Lattner · 20 years ago
- 45f37bc Added truncate. by Evan Cheng · 20 years ago
- 1aabc4e Added anyext, modelled as zext on X86. by Evan Cheng · 20 years ago
- 8dee8cc Added some isel ideas. by Evan Cheng · 20 years ago
- aed7c72 Added support for cmp, test, and conditional move instructions. by Evan Cheng · 20 years ago
- 56323c7 Only lower SELECT when using DAG based isel. by Evan Cheng · 20 years ago
- 7df96d6 X86 lowers SELECT to a cmp / test followed by a conditional move. by Evan Cheng · 20 years ago
- f5395ce Added source file/line correspondence for dwarf (PowerPC only at this point.) by Jim Laskey · 20 years ago
- d9e0ba4 Weak and linkonce global vars should still have a .globl emitted for them by Chris Lattner · 20 years ago
- f492f99 Add a second vector type to the VRRC register class, and fix some patterns by Nate Begeman · 20 years ago
- 0647bf6 add some notes by Chris Lattner · 20 years ago
- 13e1501 Add a couple more instrs by Chris Lattner · 20 years ago
- 3c1c514 remove some dead code by Chris Lattner · 20 years ago
- 17392e0 asmprint pseudo instrs by Chris Lattner · 20 years ago
- d4f2ab5 Autogenerate asmprinter for F3_2 instructions by Chris Lattner · 20 years ago
- 1c4f435 Switch F3_1 instructions over to use AsmStrings by Chris Lattner · 20 years ago
- 994b735 Plug in basic hooks for an autogenerated asm printer to fill in. by Chris Lattner · 20 years ago
- 96b84be Add operand info for F3_[12] instructions, getting V8 back to basic functionality. by Chris Lattner · 20 years ago
- 03a83c9 Remove JIT support, which doesn't work. by Chris Lattner · 20 years ago
- 3ff5751 add some simple operand info by Chris Lattner · 20 years ago
- a637c32 Update the darwin handling of linkonce & weak functions and GV stubs. This by Chris Lattner · 20 years ago
- 272f998 Don't globalize internal functions by Chris Lattner · 20 years ago
- cb17bac * Promote all 1 bit entities to 8 bit. by Evan Cheng · 20 years ago
- d0f6d18 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support by Chris Lattner · 20 years ago
- 502c5bb Added frameindex, constpool, globaladdr, and externalsym as root nodes of by Evan Cheng · 20 years ago
- 543b458 Added constpool, frameindex, and externalsym nodes. by Evan Cheng · 20 years ago
- def941b Handling zero extension of 1 bit value. by Evan Cheng · 20 years ago
- f6036a3 Use MOV8rm to load 1 bit value. by Evan Cheng · 20 years ago
- b5f8e62 Remove a now unused statistic. by Nate Begeman · 20 years ago
- a07da92 Use the new predicate support that Evan Cheng added to remove some code by Nate Begeman · 20 years ago
- 7416409 Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure. by Evan Cheng · 20 years ago
- 8c75ef9 Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS. by Evan Cheng · 20 years ago
- 58e84a6 Added support to specify predicates. by Evan Cheng · 20 years ago
- 2b52426 Fixed extload type profile. The 4th operand is a ValueType node with type by Evan Cheng · 20 years ago
- d477184 When folding loads into ops, immediately replace uses of the op with the by Chris Lattner · 20 years ago
- ad25d4e Fix the (zext (zextload)) case to trigger, similarly for sign extends. by Chris Lattner · 20 years ago
- 6860f6a Fix Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll, a crash on undefined by Chris Lattner · 20 years ago
- 00cb95c Fix a miscompilation in crafty due to a recent patch by Chris Lattner · 20 years ago
- 7a7e837 Added sext and zext patterns. by Evan Cheng · 20 years ago
- 3d2331d Added sextld + zextld DAG nodes. by Evan Cheng · 20 years ago
- 110dec2 Fold (zext (load x) to (zextload x). by Evan Cheng · 20 years ago
- 3fb6877 Add support for fmul node of type v4f32. by Nate Begeman · 20 years ago
- 993aeb2 Prepare support for AltiVec multiply, divide, and sqrt. by Nate Begeman · 20 years ago
- 328ead9 Adjust the constructor to the Linker class to take an argument that names by Reid Spencer · 20 years ago
- 2f18907 Improve ResolveFunctions to: by Reid Spencer · 20 years ago