Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / beac75da3784929aee9f0357fc5cd76d49d6c3d7 / lib / Target
  1. beac75d implement rdar://6653118 - fastisel should fold loads where possible. by Chris Lattner · 15 years ago
  2. 17aa680 zap dead code. by Chris Lattner · 15 years ago
  3. 89f87e8 remove dead code, mblaze uses SelectAddrRegImm/SelectAddrRegReg, not SelectAddr by Chris Lattner · 15 years ago
  4. 2eb63df Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles by Bruno Cardoso Lopes · 15 years ago
  5. 828f6ae make explicit that we not handle several mmx shuffles by Bruno Cardoso Lopes · 15 years ago
  6. aace0f2 Emit target specific nodes to handle palignr. Do not touch it for MMX versions yet. by Bruno Cardoso Lopes · 15 years ago
  7. c800c0d Emit target specific nodes to handle splats starting at zero indicies by Bruno Cardoso Lopes · 15 years ago
  8. bbfc310 Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMask by Bruno Cardoso Lopes · 15 years ago
  9. 4c827f5 Emit target specific nodes for isSHUFPMask by Bruno Cardoso Lopes · 15 years ago
  10. d344f28 Previous isMOVLMask matching already emits targets nodes, remove check by Bruno Cardoso Lopes · 15 years ago
  11. e09abcd One more check from the original isShuffleMaskLegal goes away by Bruno Cardoso Lopes · 15 years ago
  12. b733996 Remove a duplicated but useless check that i've inserted in the previous commit. by Bruno Cardoso Lopes · 15 years ago
  13. a22c845 Refactor some code and remove the extra checks for unpckl_undef and unpckh_undef by Bruno Cardoso Lopes · 15 years ago
  14. 43c0574 Remove check for unpckh mask by Bruno Cardoso Lopes · 15 years ago
  15. ef3adb3 Remove check for unpckl mask by Bruno Cardoso Lopes · 15 years ago
  16. 7256e22 Inline isShuffleMaskLegal into LowerVECTOR_SHUFFLE, so we can start by Bruno Cardoso Lopes · 15 years ago
  17. e8f279c Reapply considered harmfull part of rr112934 and r112942. by Bruno Cardoso Lopes · 15 years ago
  18. caa9ba2 Remove the rest of the nonexistent 64-bit AVX instructions. by Dale Johannesen · 15 years ago
  19. 190d0a5 Reapply last harmless part of r112934, the pattern fragment to match X86Unpcklpd by Bruno Cardoso Lopes · 15 years ago
  20. 2a44606 Reintroduce a simple function refactoring done in r112934, also without any functionality changes by Bruno Cardoso Lopes · 15 years ago
  21. be8b084 Reapply piecies of r112942 and r112934 which don't do functional changes by Bruno Cardoso Lopes · 15 years ago
  22. b3e0669 Reapply Fix comment by Bruno Cardoso Lopes · 15 years ago
  23. 3139422 Revert r112934, "- Use specific nodes to match unpckl masks.", which introduced by Daniel Dunbar · 15 years ago
  24. 78541f2 Revert r112938 "Fix comment", which depends on r112934, which introduced some by Daniel Dunbar · 15 years ago
  25. a87ccce Revert r112942, "Use punpckh and unpckh family of nodes instead of using unpckh by Daniel Dunbar · 15 years ago
  26. 65482b1 Re-apply r112883: by Jim Grosbach · 15 years ago
  27. fc63300 Check the local frame alignment for determining whether dynamic stack by Jim Grosbach · 15 years ago
  28. f572191 Finish converting the rest of the NEON VLD instructions to use pseudo- by Bob Wilson · 15 years ago
  29. 6a87003 Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6. by Daniel Dunbar · 15 years ago
  30. df3f256 Zap dead code. by Benjamin Kramer · 15 years ago
  31. 95f1e2d AVX doesn't support mm operations neither its instrinsics. by Bruno Cardoso Lopes · 15 years ago
  32. 4b0c9f3 Use punpckh and unpckh family of nodes instead of using unpckh mask pattern fragment by Bruno Cardoso Lopes · 15 years ago
  33. eb0c3d3 Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the by Bob Wilson · 15 years ago
  34. 01f0847 Fix comment by Bruno Cardoso Lopes · 15 years ago
  35. 5e5342b - Use specific nodes to match unpckl masks. by Bruno Cardoso Lopes · 15 years ago
  36. e573410 Simple branch instruction support. by Eric Christopher · 15 years ago
  37. 3061c44 Don't call Predicate_* from X86 target. by Jakob Stoklund Olesen · 15 years ago
  38. 7853cd0 Remove Predicate_* calls from MBlaze and XCore by Jakob Stoklund Olesen · 15 years ago
  39. 7fa846f Remove Predicate_* calls from Mips by Jakob Stoklund Olesen · 15 years ago
  40. 56d2b72 Add basic support for materializing constants (including fp) and stores. by Eric Christopher · 15 years ago
  41. ace53f2 Properly emit __chkstk call instead of __alloca on non-mingw windows targets. by Anton Korobeynikov · 15 years ago
  42. ed5c711 Move insertps mask decoding to header file by Bruno Cardoso Lopes · 15 years ago
  43. c7c62bb Revert win64 changes. They seem to be incomplete by Anton Korobeynikov · 15 years ago
  44. 1755b39 For ARM stack frames that utilize variable sized objects and have either by Jim Grosbach · 15 years ago
  45. 2f4fad9 Properly allocate win64 shadow reg area. Patch by Jan Sjodin! by Anton Korobeynikov · 15 years ago
  46. 5594560 Move decoding of insertps back to avoid unused warnings in x86 isel lowering, and fix movlhps/movhlps to decode 4 elements shuffles by Bruno Cardoso Lopes · 15 years ago
  47. 24bde5b Don't narrow the load and store in a load+twiddle+store sequence unless by Dan Gohman · 15 years ago
  48. 5c33f5b trailing whitespace by Jim Grosbach · 15 years ago
  49. 3e234e7 remove trailing whitespace by Jim Grosbach · 15 years ago
  50. 6b1d0a3 Move x86 specific shuffle mask decoding to its own header, it's also going to be used elsewhere. Also trim trailing whitespaces by Bruno Cardoso Lopes · 15 years ago
  51. bb5a039 handle case where a register class is specified by Jim Grosbach · 15 years ago
  52. e7c1416 Now that register allocation properly considers reserved regs, simplify the by Jim Grosbach · 15 years ago
  53. 5a0faba Mask out reserved registers when constructing the set of allocatable regs. by Jim Grosbach · 15 years ago
  54. 82a9c84 Fill in a missing comment. by Bob Wilson · 15 years ago
  55. ffde080 Convert VLD1 and VLD2 instructions to use pseudo-instructions until by Bob Wilson · 15 years ago
  56. 3722f00 Replace unpckl_undef and unpckh_undef matching with target specific opcodes by Bruno Cardoso Lopes · 15 years ago
  57. dd69db8 Move condition out to prepare for more matching by Bruno Cardoso Lopes · 15 years ago
  58. ad10fb2 Remove checking for isUNPCKL_v_undef_Mask, the specific node is already emitted for it by Bruno Cardoso Lopes · 15 years ago
  59. d00bfe1 become more strict about when it's safe to use X86ISD::MOVLPS by Bruno Cardoso Lopes · 15 years ago
  60. 1f58741 Clang's -ccc-host-triple was ignoring the arch specifier on my triple, by Eric Christopher · 15 years ago
  61. 1b61ef4 This should be TargetMaterializeConstant instead. by Eric Christopher · 15 years ago
  62. eaa204b One definition of isThumb is plenty, thanks. by Eric Christopher · 15 years ago
  63. b0739b7 Remove trailing whitespace by Jim Grosbach · 15 years ago
  64. 318b6ee Rework arm fast-isel load and store handling. Move offset computation by Eric Christopher · 15 years ago
  65. 7af3a34 trivial cleanup by Jim Grosbach · 15 years ago
  66. 352f235 Simplify the tGPR register class now that the register allocators know not by Jim Grosbach · 15 years ago
  67. d0b69cf Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, by Bob Wilson · 15 years ago
  68. 4783a3e Revert r112689, avoid those kind of checks cause they mess up with mmx by Bruno Cardoso Lopes · 15 years ago
  69. 29c353b Using target specific nodes for shuffle nodes makes the mask by Bruno Cardoso Lopes · 15 years ago
  70. 543cf05 Some basic store support. by Eric Christopher · 15 years ago
  71. 4e68c7c Add some more load types in. by Eric Christopher · 15 years ago
  72. 14ab39e zap dead code. by Chris Lattner · 15 years ago
  73. 5bcb8a6 temporarily revert r112664, it is causing a decoding conflict, and by Chris Lattner · 15 years ago
  74. 56098f5 Use movlps, movlpd, movss and movsd specific nodes instead of pattern matching with movlp pattern fragment by Bruno Cardoso Lopes · 15 years ago
  75. 9cfad89 minor change, simplify some logic by Bruno Cardoso Lopes · 15 years ago
  76. e654b56 Move some functions around so they can be used for some other to come function by Bruno Cardoso Lopes · 15 years ago
  77. 43a6c5e We have a chance for an optimization. Consider this code: by Bill Wendling · 15 years ago
  78. 013bb3d Use x86 specific MOVSLDUP node, add more patterns to match it and remove useless load nodes by Bruno Cardoso Lopes · 15 years ago
  79. 5023ef2 Use x86 specific MOVSHDUP node and add more patterns to match it by Bruno Cardoso Lopes · 15 years ago
  80. 2d811d3 And ANDS pattern to match the t2ANDS pattern. by Bill Wendling · 15 years ago
  81. 63b1dba Make %EFLAGS unallocatable. by Jakob Stoklund Olesen · 15 years ago
  82. 7ff30bb Use MOVHLPS node instead of matching using movhlps and movhlps_undef pattern fragments by Bruno Cardoso Lopes · 15 years ago
  83. f2db5b4 Use MOVLHPS and MOVHLPS x86 nodes whenever possible. Also remove some useless nodes by Bruno Cardoso Lopes · 15 years ago
  84. c1dc78d SP relative offsets need to be adjusted by the local allocation size when by Jim Grosbach · 15 years ago
  85. d4511e9 this assert should just be a condition, since this function is just asking if by Jim Grosbach · 15 years ago
  86. da2ae63 - Cleanup some whitespaces. by Bill Wendling · 15 years ago
  87. 20a07f4 Use X86ISD::MOVSS and MOVSD to represent the movl mask pattern, also fix the handling of those nodes when seeking for scalars inside vector shuffles by Bruno Cardoso Lopes · 15 years ago
  88. dc90804 Rewrite slightly so we can expand for floating point types easier. by Eric Christopher · 15 years ago
  89. 548d1bb If we have an unhandled type then assert, we shouldn't get here for by Eric Christopher · 15 years ago
  90. 6d1e29d Expand MOVi32imm in ARM mode after regalloc. This provides by Anton Korobeynikov · 15 years ago
  91. 55c134a Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, which by Bill Wendling · 15 years ago
  92. 2536279 Remember to clear the shadow kill flag at the same time as clearing the real by Jakob Stoklund Olesen · 15 years ago
  93. 973a074 Remove NEON vmovn intrinsic, replacing it with vector truncate operations. by Bob Wilson · 15 years ago
  94. 663e339 Make ARM add rN, sp, #imm instructions rematerializable. That's how the address of locals is calculated, so this should by Jim Grosbach · 15 years ago
  95. 7e70197 When expanding NEON VST pseudo instructions, if the original super-register by Bob Wilson · 15 years ago
  96. 4822bce Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is the by Bill Wendling · 15 years ago
  97. bd887df Fix lowering of INSERT_VECTOR_ELT in SPU. by Kalle Raiskila · 15 years ago
  98. 10ce7f3 Fix whitespaces. No functionality changes. by Bill Wendling · 15 years ago
  99. 04d6c28 Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm by Bob Wilson · 15 years ago
  100. 5033f64 A couple of small missed optimizations. by Eli Friedman · 15 years ago