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llvm
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c038a7833565ecf92a699371d448135a097c9e2f
c038a78
Now that Reassociate's LinearizeExprTree can look through arbitrary expression
by Duncan Sands
· 12 years ago
3f696e5
Add two newlines in ParseSubtargetFeatures's debug output after the CPU is printed.
by Hal Finkel
· 12 years ago
4db738a
Reapply r158337, this time properly protect Darwin/PPC host CPU use with __ppc__.
by Hal Finkel
· 12 years ago
3e61374
Satisfy C++ aliasing rules, per suggestion by Chandler.
by Argyrios Kyrtzidis
· 12 years ago
138c2b4
Revert r158337 "Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName()."
by Jakob Stoklund Olesen
· 12 years ago
32f9bca
FileCheck docs: remove leftover HTML markup.
by Dmitri Gribenko
· 12 years ago
793537d
For llvm::sys::ThreadLocalImpl instead of malloc'ing the platform-specific
by Argyrios Kyrtzidis
· 12 years ago
0eb3a35
misched: When querying RegisterPressureTracker, always save current and max pressure.
by Andrew Trick
· 12 years ago
4487479
misched: regpressure getMaxPressureDelta, revert accidental checkin.
by Andrew Trick
· 12 years ago
7bb39d8
Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName().
by Hal Finkel
· 12 years ago
ad27086
Fix test that depends on register allocation.
by Jakob Stoklund Olesen
· 12 years ago
5a53c6e
Enable MFOCRF generation on the PPC A2 core.
by Hal Finkel
· 12 years ago
bd5cafd
Rename the PPC target feature gpul to mfocrf.
by Hal Finkel
· 12 years ago
9770be9
Add A2 to the list of PPC CPUs recognized by Linux host CPU-type detection.
by Hal Finkel
· 12 years ago
7ed1ad5
Fix test case to work on ARM.
by Jakob Stoklund Olesen
· 12 years ago
0a1852b
Emit the two-operand form of the PPC mfcr instruction as mfocrf.
by Hal Finkel
· 12 years ago
2bd0acd
Add local CPU detection for Linux PPC.
by Hal Finkel
· 12 years ago
622382f
Add POWER6 and POWER7 CPU types to the PPC backend.
by Hal Finkel
· 12 years ago
6f36fa9
Write llvm-tblgen backends as functions instead of sub-classes.
by Jakob Stoklund Olesen
· 12 years ago
20aedcd
Fix a problem with the reverse bundle iterators.
by Jakob Stoklund Olesen
· 12 years ago
773ef61
Object file output from llc isn't experimental anymore.
by Benjamin Kramer
· 12 years ago
ad5c880
Re-enable the CMN instruction.
by Bill Wendling
· 12 years ago
7a99b46
InstCombine: factor code better.
by Benjamin Kramer
· 12 years ago
66821d9
InstCombine: Turn (zext A) == (B & (1<<X)-1) into A == (trunc B), narrowing the compare.
by Benjamin Kramer
· 12 years ago
71ffcfe
Enable ILP scheduling for all nodes by default on PPC.
by Hal Finkel
· 12 years ago
3c98ce2
Add AutoUpgrade support for the SSE4 ptest intrinsics.
by Nadav Rotem
· 12 years ago
01a90f4
Use critical anti-dep. breaking on all PPC targets, but also add other register classes.
by Hal Finkel
· 12 years ago
cfd3ed9
Add intrinsics for immediate form of XOP vprot instructions. Use i128mem instead of f128mem for integer XOP instructions.
by Craig Topper
· 12 years ago
0a3e33b
Improve ext/trunc patterns on PPC64.
by Hal Finkel
· 12 years ago
2a5dc43
Use XOP vpcom intrinsics in patterns instead of a target specific SDNode type. Remove the custom lowering code that selected the SDNode type.
by Craig Topper
· 12 years ago
c29106b
Replace XOP vpcom intrinsics with fewer intrinsics that take the immediate as an argument.
by Craig Topper
· 12 years ago
82ce516
Hashing: Remove outdated comment. Support for reserved hash values was removed in r151865.
by Benjamin Kramer
· 12 years ago
133fe75
Disabling a spurious deprecation warning about using PathV1 from within the PathV1 implementation file.
by Aaron Ballman
· 12 years ago
19472a6
Fixing a typo in the comments.
by Aaron Ballman
· 12 years ago
f33a79c
Allocate the contents of DwarfDebug's StringMaps in a single big BumpPtrAllocator.
by Benjamin Kramer
· 12 years ago
af0d459
Silence a gcc-4.6 warning: GCC fails to understand that secondReg and cmpOp2 are
by Duncan Sands
· 12 years ago
8bf75ed
Enable tail merging on PPC.
by Hal Finkel
· 12 years ago
ba17293
Register pressure: added getPressureAfterInstr.
by Andrew Trick
· 12 years ago
8879480
Sketch a LiveRegMatrix analysis pass.
by Jakob Stoklund Olesen
· 12 years ago
b9bfe48
Test commit
by Jack Carter
· 12 years ago
fe17bdb
Also compute MBB live-in lists in the new rewriter pass.
by Jakob Stoklund Olesen
· 12 years ago
77592fe
Convert comments to proper Doxygen comments.
by Dmitri Gribenko
· 12 years ago
dddc1cf
Removing strange "using" declarations form TargetInstrInfo.
by Andrew Trick
· 12 years ago
05ec712
Reintroduce VirtRegRewriter.
by Jakob Stoklund Olesen
· 12 years ago
6660ed5
Don't run RAFast in the optimizing regalloc pipeline.
by Jakob Stoklund Olesen
· 12 years ago
0f68fbb
canonicalize: -%a + 42 into 42 - %a
by Nuno Lopes
· 12 years ago
791e2e0
Start implementing pre-ra if-converter: using speculation and selects to eliminate branches.
by Evan Cheng
· 12 years ago
eb81df7
TargetInstrInfo hooks implemented in codegen should be declared pure virtual.
by Andrew Trick
· 12 years ago
841f426
Reapply commit 158073 with a fix (the testcase was already committed). The
by Duncan Sands
· 12 years ago
16b16ac
Remove the TODO statement in the PPC README re: CTR loops
by Hal Finkel
· 12 years ago
7255d2a
Enable PPC CTR loop formation by default.
by Hal Finkel
· 12 years ago
7e56312
Mark the PPC CTRRC and CTRRC8 register classes as non-allocatable.
by Hal Finkel
· 12 years ago
45d53b8
Enable optimization for integer ABS on X86 if Subtarget has CMOV.
by Manman Ren
· 12 years ago
6620ccf
Test case for r158160
by Manman Ren
· 12 years ago
0076ad7
Sched itinerary fix: Avoid static initializers.
by Andrew Trick
· 12 years ago
28dd960
Fix a crash in APInt::lshr when shiftAmt > BitWidth.
by Chad Rosier
· 12 years ago
c36d033
Fix Target->Codegen dependence.
by Andrew Trick
· 12 years ago
eb90adf
BoundsChecking: add support for ConstantPointerNull. fixes a bunch of instrumentation failures in loops with reallocs
by Nuno Lopes
· 12 years ago
7c18922
test/CodeGen/Generic/APIntLoadStore.ll: Mark as XFAIL:ppc since r157911.
by NAKAMURA Takumi
· 12 years ago
09fdc7b
Disable the PPC CTR-Loops pass by default.
by Hal Finkel
· 12 years ago
daa03ec
Fix a bug in the new PPC CTR-Loops pass.
by Hal Finkel
· 12 years ago
99f823f
Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form CTR-based loop branching code.
by Hal Finkel
· 12 years ago
69938a8
Revert commit 158073 while waiting for a fix. The issue is that reassociate
by Duncan Sands
· 12 years ago
2563ad2
cmake: Pass the -m32 flag to modules if LLVM_BUILD_32_BITS is enabled
by Tobias Grosser
· 12 years ago
7e8921b
Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a complex operand are called out explicitly in the asm string.
by Owen Anderson
· 12 years ago
67762d1
[CMake] Promote extension warnings to errors.
by Michael J. Spencer
· 12 years ago
9236362
X86: optimize generated code for integer ABS
by Manman Ren
· 12 years ago
fa371ea
[CMake] Order MSVC warnings numerically.
by Michael J. Spencer
· 12 years ago
c3ab9ce
[CMake] Adjust MSVC warnings.
by Michael J. Spencer
· 12 years ago
bdcae38
Do not optimize the used bits of the x86 vselect condition operand, when the condition operand is a vector of 1-bit predicates.
by Nadav Rotem
· 12 years ago
2f6622c
Fix a bug in FoldSelectOpOp. Bitcast ops may change the number of vector elements, which may disagree with the select condition type.
by Nadav Rotem
· 12 years ago
397f4e3
Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.
by Andrew Trick
· 12 years ago
68b1654
ARM getOperandLatency rewrite.
by Andrew Trick
· 12 years ago
f377071
ARM getOperandLatency should return -1 for unknown, consistent with API
by Andrew Trick
· 12 years ago
ed7a51e
Fix ARM getInstrLatency logic to work with the current API.
by Andrew Trick
· 12 years ago
e6fc9d4
PR13046: we can't replace usage of SUB with CMP in the lowering phase.
by Manman Ren
· 12 years ago
c07f5bb
Use a base register instead of an index register with the local dynamic model.
by Rafael Espindola
· 12 years ago
83569cb
Move terminator machine verification to check MachineBasicBlock::instr_iterator instead of MBB::iterator
by Pete Cooper
· 12 years ago
4efea94
Add internal read flags to MachineInstrBuilder and hook them into the MachineOperand flag of the same name
by Pete Cooper
· 12 years ago
13a53e6
Adding a missing -S to the opt invocation.
by Meador Inge
· 12 years ago
87253c2
X86: replace SUB with CMP if possible
by Manman Ren
· 12 years ago
d66ec52
Spell optimization name correclty.
by Bill Wendling
· 12 years ago
2afde77
Revert r157755.
by Manman Ren
· 12 years ago
aed04d1
Another testcase for r156548. <rdar://problem/10889741>
by Bill Wendling
· 12 years ago
4d61664
[llvm-nm] Update documentation to cover object file support and arguments.
by Michael J. Spencer
· 12 years ago
1f9c3ec
Properly verify liveness with bundled machine instructions.
by Jakob Stoklund Olesen
· 12 years ago
8e5271d
Add accessors for all private members of DisasmContext.
by Benjamin Kramer
· 12 years ago
1525260
Move RegisterClassInfo.h.
by Andrew Trick
· 12 years ago
955f938
Remove dead private member variables from gtest.
by Benjamin Kramer
· 12 years ago
afc2657
Move RegisterPressure.h.
by Andrew Trick
· 12 years ago
95a9d93
Round 2 of dead private variable removal.
by Benjamin Kramer
· 12 years ago
a7542d5
Remove unused private fields found by clang's new -Wunused-private-field.
by Benjamin Kramer
· 12 years ago
a97b180
Add support for dynamic stack realignment in the presence of dynamic allocas on
by Chad Rosier
· 12 years ago
8b421c8
Fix combine of uno && ord -> false so that the ordering of the fcmps doesn't
by Chad Rosier
· 12 years ago
461e7ea
Remove dead debug option -disable-rematerialization.
by Jakob Stoklund Olesen
· 12 years ago
b933586
Grab-bag of reassociate tweaks. Unify handling of dead instructions and
by Duncan Sands
· 12 years ago
d14e4e1
Stop leaking RegScavengers from TailDuplication.
by Benjamin Kramer
· 12 years ago
c8f2fcc
Correct decoder for T1 conditional B encoding
by Richard Barton
· 12 years ago
12e959c
Add a new broken compiler.
by Duncan Sands
· 12 years ago
3949b83
Mark several instructions SSE2 instead of SSE3 as they should be.
by Craig Topper
· 12 years ago
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