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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / c1f53c742620dd4f2460685477303002bba8a8d8 / lib / CodeGen / VirtRegMap.cpp
  1. c1f53c7 Transfer physical register spill info when load / store folding happens. by Evan Cheng · 17 years ago
  2. 676dd7c When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. by Evan Cheng · 17 years ago
  3. 6130f66 Refactor code. Remove duplicated functions that basically do the same thing as by Evan Cheng · 17 years ago
  4. 21b3f31 Fix a bug in dead spill slot elimination. by Evan Cheng · 17 years ago
  5. 6ef781f Final de-tabification. by Bill Wendling · 17 years ago
  6. d365312 Spiller now remove unused spill slots. by Evan Cheng · 17 years ago
  7. e6d088a Rename PrintableName to Name. by Bill Wendling · 17 years ago
  8. 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 17 years ago
  9. f059deb De-tabify. by Bill Wendling · 17 years ago
  10. b2fd65f Make sure reload of implicit uses are issued before remat's. by Evan Cheng · 17 years ago
  11. d70dbb5 Enable re-materialization of instructions which have virtual register operands if by Evan Cheng · 17 years ago
  12. 4c71dfe Update gcc 4.3 warnings fix patch with recent head changes by Anton Korobeynikov · 17 years ago
  13. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  14. f2f8c2a Forgot these files. by Evan Cheng · 18 years ago
  15. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
  16. 349c495 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor by Chris Lattner · 18 years ago
  17. 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
  18. 6425f8b Update CodeGen for MRegisterInfo --> TargetInstrInfo changes. by Owen Anderson · 18 years ago
  19. f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
  20. d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
  21. 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  22. f738230 More cleanups for MachineOperand: by Chris Lattner · 18 years ago
  23. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  24. 39c883c If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill. by Evan Cheng · 18 years ago
  25. d120ffd MachineInstr can change. Store indexes instead. by Evan Cheng · 18 years ago
  26. adf8590 If a split live interval is spilled again, remove the kill marker on its last use. by Evan Cheng · 18 years ago
  27. b50bb8c Fix kill info for split intervals. by Evan Cheng · 18 years ago
  28. 018f9b0 - Mark last use of a split interval as kill instead of letting spiller track it. by Evan Cheng · 18 years ago
  29. d64b5c8 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether by Evan Cheng · 18 years ago
  30. dd86ce3 Remove a unsafe optimization. This fixes 401.bzip2. by Evan Cheng · 18 years ago
  31. 35a3e4a Spiller unfold optimization bug: do not clobber a reusable stack slot value unless it can be modified. by Evan Cheng · 18 years ago
  32. e4b3900 Bug fixes. by Evan Cheng · 18 years ago
  33. 70306f8 Update kill info for uses of split intervals. by Evan Cheng · 18 years ago
  34. aee4af6 Remove redundant foldMemoryOperand variants and other code clean up. by Evan Cheng · 18 years ago
  35. 0cbb116 Fixed various live interval splitting bugs / compile time issues. by Evan Cheng · 18 years ago
  36. cada245 Recover compile time regression. by Evan Cheng · 18 years ago
  37. 81a0382 Live interval splitting: by Evan Cheng · 18 years ago
  38. c498b02 Clean up sub-register implementation by moving subReg information back to by Evan Cheng · 18 years ago
  39. 7277a7d One more extract_subreg coalescing bug. by Evan Cheng · 18 years ago
  40. cbfb9b2 - Only perform the unfolding optimization when the folding in question is modref. by Evan Cheng · 18 years ago
  41. 66f7163 Local spiller optimization: by Evan Cheng · 18 years ago
  42. 7f56625 Local spiller optimization: by Evan Cheng · 18 years ago
  43. 32dfbea EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like by Evan Cheng · 18 years ago
  44. 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 18 years ago
  45. 92dfe20 Remove isReg, isImm, and isMBB, and change all their users to use by Dan Gohman · 18 years ago
  46. 04fa32f by David Greene · 18 years ago
  47. 90a43c3 If the source of a move is in spill slot, the reload may be folded to essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live. by Evan Cheng · 18 years ago
  48. b6ca4b3 - If a def is dead, do not spill it. by Evan Cheng · 18 years ago
  49. c91f0b8 If a MI's def is remat as well as spilled, and the store is later deemed dead, mark the def operand as isDead. by Evan Cheng · 18 years ago
  50. fff3e19 If a spilled value is being reused and the use is a kill, that means there are by Evan Cheng · 18 years ago
  51. dc6be19 If a rematerializable def is not deleted, i.e. it is also spilled, check if the by Evan Cheng · 18 years ago
  52. 549f27d3 Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. by Evan Cheng · 18 years ago
  53. 28bb462 Missed a couple of places where new instructions are added due to spill / restore. by Evan Cheng · 18 years ago
  54. b9591c6 No longer need to track last def / use. by Evan Cheng · 18 years ago
  55. 0c40d72 Fix for PR1545: Revamp code that update kill information due to register reuse. by Evan Cheng · 18 years ago
  56. 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 18 years ago
  57. c101e95 Add a target hook to allow loads from constant pools to be rematerialized, and an by Dan Gohman · 18 years ago
  58. faa5107 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. by Evan Cheng · 18 years ago
  59. 6c087e5 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 18 years ago
  60. 9193514 Re-materialize all loads from fixed stack slots. by Evan Cheng · 18 years ago
  61. 7cb33c8 Don't add the same MI to register reuse "last def/use" twice if it reads the by Evan Cheng · 18 years ago
  62. 018d6e1 Don't call getOperandConstraint() if operand index is greater than by Evan Cheng · 18 years ago
  63. ad7ccf3 Fix for PR1266. Don't mark a two address operand IsKill. by Evan Cheng · 18 years ago
  64. 2638e1a First cut trivial re-materialization support. by Evan Cheng · 18 years ago
  65. a7288df Only propagate IsKill if the last use is a kill. by Evan Cheng · 18 years ago
  66. 6b44809 - Keep track all def and uses of stack slot available in register. by Evan Cheng · 18 years ago
  67. c3dd314 Invalidate last use of a reused register if the use is a deleted noop copy. by Evan Cheng · 18 years ago
  68. c0ba1bc A restore is promoted to copy (or deleted entirely), remove the kill from the last use of the targetted register. by Evan Cheng · 18 years ago
  69. de4e942 A couple of more places where a register liveness has been extended and its last kill should be updated accordingly. by Evan Cheng · 18 years ago
  70. 50d25d7 Reuse extends the liveness of a register. Transfer the kill to the operand that reuse it. by Evan Cheng · 18 years ago
  71. 91e2390 A spill kills the register being stored. But it is later being reused by spiller, its live range has to be extended. by Evan Cheng · 18 years ago
  72. 957840b Use BitVector instead. No functionality change. by Evan Cheng · 18 years ago
  73. 667089d Dead code. by Evan Cheng · 18 years ago
  74. f50d09a Fixed a long standing spiller bug that's exposed by Thumb: by Evan Cheng · 19 years ago
  75. 08a4d5a Switch this to use SmallSet to avoid mallocs in the common case. by Chris Lattner · 19 years ago
  76. 3c82cab GetRegForReload() now keeps track which registers have been considered and rejected during its quest to find a suitable reload register. This avoids an infinite loop in case like this: by Evan Cheng · 19 years ago
  77. cd3245a Eliminate static ctors from Statistics by Chris Lattner · 19 years ago
  78. 5c7e326 Added an automatic cast to "std::ostream*" etc. from OStream. We then can by Bill Wendling · 19 years ago
  79. 86facc2 Minor clean up. by Evan Cheng · 19 years ago
  80. 7a0d51c Fix a long-standing spiller bug: by Evan Cheng · 19 years ago
  81. cc22a7a Move findTiedToSrcOperand to TargetInstrDescriptor. by Evan Cheng · 19 years ago
  82. 5c2a460 Proper fix for PR1037: to determine is a VR is a modref, check 1) whether it is by Evan Cheng · 19 years ago
  83. fe46361 Revision 1.83 causes PR1037. Reverted. by Reid Spencer · 19 years ago
  84. e815619 Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are by Bill Wendling · 19 years ago
  85. 51cdcd1 MI keeps a ptr of TargetInstrDescriptor, use it. by Evan Cheng · 19 years ago
  86. 6065f66 getOperandConstraint returns -1 if the operand does have the specific constraint. This bug was causing excessive spills. by Evan Cheng · 19 years ago
  87. ac0b6ae Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 19 years ago
  88. ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 19 years ago
  89. b2b9c20 More removal of std::cerr and DEBUG, replacing with DOUT instead. by Bill Wendling · 19 years ago
  90. e077ef6 Fixed some spiller bugs exposed by the recent two-address code changes. Now by Evan Cheng · 19 years ago
  91. e6ae14e Rename by Evan Cheng · 19 years ago
  92. 360c2dd Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together. by Evan Cheng · 19 years ago
  93. 6ec3626 restore my previous patch, now that the X86 backend bug has been fixed: by Chris Lattner · 19 years ago
  94. b870100 Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping. by Evan Cheng · 19 years ago
  95. f183cab If we see a load from a stack slot into a physreg, consider it as providing by Chris Lattner · 19 years ago
  96. 2926869 Fix a long-standing wart in the code generator: two-address instruction lowering by Chris Lattner · 19 years ago
  97. a4f0b3a s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| by Chris Lattner · 19 years ago
  98. f7da2c7 Take advantage of the recent improvements to the liveintervals set (tracking by Chris Lattner · 19 years ago
  99. d36d03b Added a check so that if we have two machine instructions in this form by Bill Wendling · 19 years ago
  100. cd4317e Eliminate data relocations by using NULL instead of global empty list. by Jim Laskey · 19 years ago