- c215b3e Handle quoted names when constructing $stub's, $non_lazy_ptr's and $lazy_ptr's. by Dale Johannesen · 17 years ago
- b578310 trip count computation deficiency by Chris Lattner · 17 years ago
- ea7dd40 Record weak external linkage in a case where we were by Dale Johannesen · 17 years ago
- 7cbd8a3 API change for {BinaryOperator|CmpInst|CastInst}::create*() --> Create. Legacy interfaces will be in place for some time. (Merge from use-diet branch.) by Gabor Greif · 17 years ago
- f88c81e Treat common as distinct from weak global on Darwin x86. by Dale Johannesen · 17 years ago
- 0ef8de3 Fix typos and comments. by Evan Cheng · 17 years ago
- f0df031 Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these. by Evan Cheng · 17 years ago
- bb60674 Silence warnings. by Evan Cheng · 17 years ago
- aafce77 Add CommonLinkage; currently tentative definitions by Dale Johannesen · 17 years ago
- 2010b3e Detabification. Fixed indentation and spacing. by Sanjiv Gupta · 17 years ago
- 9474ede Fix typo in ParameterAttribute fields usage. Add an include by Nicolas Geoffray · 17 years ago
- 2d4e7f7 Fixed the file description header at the top to remove the developer name. by Sanjiv Gupta · 17 years ago
- 6bf8770 Doh. Alignment is in bytes, not in bits. by Evan Cheng · 17 years ago
- c9f5f3f Change target-specific classes to use more precise static types. by Dan Gohman · 17 years ago
- 3b34e1e add a note by Chris Lattner · 17 years ago
- b656443 - Fix the pasto in the fix for a previous pasto. by Evan Cheng · 17 years ago
- 7171c83 add a note by Chris Lattner · 17 years ago
- 32097bd Fix one more encoding bug. by Nate Begeman · 17 years ago
- 11b6793 - Don't treat anyext 16-bit load as a 32-bit load if it's volatile. by Evan Cheng · 17 years ago
- 0e68771 Adding files for Microchip's PIC16 target. by Sanjiv Gupta · 17 years ago
- 77f0b7a Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset. by Evan Cheng · 17 years ago
- c9bdb00 Fix and encoding error in the psrad xmm, imm8 instruction. by Nate Begeman · 17 years ago
- fa7fd33 On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16. by Evan Cheng · 17 years ago
- 844731a Clean up the use of static and anonymous namespaces. This turned up by Dan Gohman · 17 years ago
- 0d1704b Teach Legalize how to scalarize VSETCC by Nate Begeman · 17 years ago
- 9bfa03c Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other. by Evan Cheng · 17 years ago
- 9f8fea3 Constify the machine instruction passed into the by Bill Wendling · 17 years ago
- c2616e4 Initial X86 codegen support for VSETCC. by Nate Begeman · 17 years ago
- 9499b71 Fix a copy+paste bug; pseudo-instructions shouldn't have encoding information. by Dan Gohman · 17 years ago
- ad4196b Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it. by Evan Cheng · 17 years ago
- b43e9c1 Add support for vicmp/vfcmp codegen, more legalize support coming. by Nate Begeman · 17 years ago
- 2ce3898 Fix a compile error on compilers that still want a return value by Dan Gohman · 17 years ago
- 64d6910 Add note by Anton Korobeynikov · 17 years ago
- 50d9e72 When transforming a vector_shuffle to a load, the base address must not be an undef. by Evan Cheng · 17 years ago
- 9018e83 For now, abort when an ISD::VAARG is encountered on x86-64, rather by Dan Gohman · 17 years ago
- b70ea0b Some clean up. by Evan Cheng · 17 years ago
- 25210da If movl top bits are undef, let it be selected to movlps, etc. by Evan Cheng · 17 years ago
- 23573e5 Add a pattern to do move the low element of a v4f32 and zero extend the rest. by Evan Cheng · 17 years ago
- d880b97 Handle a few more cases of folding load i64 into xmm and zero top bits. by Evan Cheng · 17 years ago
- fd17f42 Use movq to move low half of XMM register and zero-extend the rest. by Evan Cheng · 17 years ago
- 7e2ff77 Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. by Evan Cheng · 17 years ago
- 671fa97 Output correct exception handling and frame info by Duncan Sands · 17 years ago
- 3bf6acc Match things like 'armv5tejl-unknown-linux-gnu' for PR2290 by Chris Lattner · 17 years ago
- 4a3f6c8 Make several variable declarations static. by Dan Gohman · 17 years ago
- 88c1baa add a micro optzn. by Chris Lattner · 17 years ago
- ab3e747 Improved generated code for atomic operators by Mon P Wang · 17 years ago
- 71f489d Code clean up. No functionality change. by Evan Cheng · 17 years ago
- 63307c3 Added addition atomic instrinsics and, or, xor, min, and max. by Mon P Wang · 17 years ago
- 94bbdc8 Fix IsLinux being uninitialized on non-Linux targets. by Dan Gohman · 17 years ago
- aa57a7f Fix 80col violation by Anton Korobeynikov · 17 years ago
- 600bf16 Use a dedicated IsLinux flag instead of an ELFLinux TargetType. by Dan Gohman · 17 years ago
- a779a98 Add AsmPrinter support for emitting a directive to declare that by Dan Gohman · 17 years ago
- 6625eff Add General Dynamic TLS model for X86-64. Some parts looks really ugly (look for tlsaddr pattern), by Anton Korobeynikov · 17 years ago
- 5759f97 Select vector shift with non-immediate i32 shift amount operand by first moving the operand into the right register. by Evan Cheng · 17 years ago
- 22b942a Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code. by Evan Cheng · 17 years ago
- 082f116 Undo r50574. We are already ensuring the folded load address is 16-byte aligned. by Evan Cheng · 17 years ago
- b609339 80 column violation. by Evan Cheng · 17 years ago
- ef6a512 Not safe folding a load + FsXORPSrr into FsXORPSrm. It's loading a FR64 value but the load folding variant expects a 16-byte aligned address. by Evan Cheng · 17 years ago
- 30e62c0 Tail call optimization improvements: by Arnold Schwaighofer · 17 years ago
- 203b2d6 Bug fixes and updates for CellSPU, syncing up with trunk. Most notable by Scott Michel · 17 years ago
- 966e799 Don't do stupid things: doInitialization(Module&) is not applicable to ModulePass :) by Anton Korobeynikov · 17 years ago
- 1f13c68 Fix the SVOffset values for loads and stores produced by by Dan Gohman · 17 years ago
- 2810d67 Fix FP return for Win64 ABI by Anton Korobeynikov · 17 years ago
- 998a5bc Properly lower vararg's FORMAL_ARGUMENTS node on win64 by Anton Korobeynikov · 17 years ago
- 7255193 Handle fp80 for win64 by Anton Korobeynikov · 17 years ago
- 5e76423 A few inline asm cleanups: by Chris Lattner · 17 years ago
- 2ba1c06 no need to implement this method and just have it call the default impl. by Chris Lattner · 17 years ago
- 44c0fd1 Extract the lower 64-bit if a MMX value is passed in a XMM register. by Evan Cheng · 17 years ago
- 082948d Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value. by Evan Cheng · 17 years ago
- 10e8642 Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers. by Evan Cheng · 17 years ago
- 80f5404 Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller type to a larger one. by Evan Cheng · 17 years ago
- 7c400dc add a note by Chris Lattner · 17 years ago
- 682f810 80 col violation. by Evan Cheng · 17 years ago
- 419ace9 Not checking for intrinsics which do not have a chain operand. by Evan Cheng · 17 years ago
- cdda25d - Switch from std::set to SmallPtrSet. - Add comments. by Evan Cheng · 17 years ago
- ee472b1 MMX argument passing fixes: by Evan Cheng · 17 years ago
- 25453ea Loosen up an assertion to allow intrinsics. I really have no by Chris Lattner · 17 years ago
- 2749c72 Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero. by Evan Cheng · 17 years ago
- 3c02aca Make these variables static. by Dan Gohman · 17 years ago
- 0d9e02c Drop dead includes by Anton Korobeynikov · 17 years ago
- 8d3e74e Adjust option names for C++ backend by Anton Korobeynikov · 17 years ago
- 5027652 First step of implementing PR1538: move llvm2cpp logic to new 'target' by Anton Korobeynikov · 17 years ago
- 7661279 Initial CBE support for multiple return values. by Dan Gohman · 17 years ago
- 941ff58 Fix typo by Anton Korobeynikov · 17 years ago
- dc28bd4 Only allow increase of max alignment value by Anton Korobeynikov · 17 years ago
- d52bdaf Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register. by Anton Korobeynikov · 17 years ago
- 856914f Add X86 Maximal Stack Alignment Calculator Pass before RA by Anton Korobeynikov · 17 years ago
- 2c430cb Do proper book-keeping of offsets and prologue/epilogue code for stack realignment by Anton Korobeynikov · 17 years ago
- 8e91ec5 If stack realignment is used - incoming args will use EBP as base register and locals - ESP by Anton Korobeynikov · 17 years ago
- b51dce3 Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not by Anton Korobeynikov · 17 years ago
- d1c133a Cleanup by Anton Korobeynikov · 17 years ago
- 82751e3 Simplify by Anton Korobeynikov · 17 years ago
- 45709ae Make stack alignment options global for all targets by Anton Korobeynikov · 17 years ago
- cfcd20e Provide option for enabling-disabling stack realignment by Anton Korobeynikov · 17 years ago
- 35410a4 Disable stack realignment for functions with dynamic-sized alloca's by Anton Korobeynikov · 17 years ago
- 890fe88 Provide ABI-correct stack alignment by Anton Korobeynikov · 17 years ago
- 9bbbea5 Provide convenient helpers for some operations by Anton Korobeynikov · 17 years ago
- e201190 Whitespace cleanup by Anton Korobeynikov · 17 years ago
- 61a9213 Implement an x86-64 ABI detail of passing structs by hidden first by Dan Gohman · 17 years ago
- 0416b0a Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR. by Dan Gohman · 17 years ago